参数资料
型号: CA3338AE
厂商: Intersil
文件页数: 1/10页
文件大小: 0K
描述: IC CONV D/A R2R CMOS 8-BIT 16DIP
标准包装: 25
设置时间: 20ns
位数: 8
数据接口: 并联
转换器数目: 1
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 通孔
封装/外壳: 16-DIP(0.300",7.62mm)
供应商设备封装: 16-PDIP
包装: 管件
输出数目和类型: 1 电压,单极;1 电压,双极
采样率(每秒): 50M
其它名称: CA3338
CA338
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Harris Corporation 1997. Copyright Intersil Americas Inc. 2003, 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
CMOS Video Speed, 8-Bit, 50 MSPS, R2R
D/A Converters
The CA3338 family are CMOS/SOS high speed R2R voltage
output digital-to-analog converters. They can operate from a
single +5V supply, at video speeds, and can produce
“rail-to-rail” output swings. Internal level shifters and a pin for
an optional second supply provide for an output range below
digital ground. The data complement control allows the
inversion of input data while the latch enable control provides
either feedthrough or latched operation. Both ends of the
R2R ladder network are available externally and may be
modulated for gain or offset adjustments. In addition, “glitch”
energy has been kept very low by segmenting and
thermometer encoding of the upper 3 bits.
The CA3338 is manufactured on a sapphire substrate to give
low dynamic power dissipation, low output capacitance, and
inherent latch-up resistance.
Ordering Information
Features
CMOS/SOS Low Power
R2R Output, Segmented for Low “Glitch”
CMOS/TTL Compatible Inputs
Fast Settling: (Typ) to 1/2 LSB . . . . . . . . . . . . . . . . . . 20ns
Feedthrough Latch for Clocked or Unclocked Use
Accuracy (Typ) . . . . . . . . . . . . . . . . . . . . . . . . . .
±0.5 LSB
Data Complement Control
High Update Rate (Typ) . . . . . . . . . . . . . . . . . . . . . 50MHz
Unipolar or Bipolar Operation
Pb-free Available
Applications
TV/Video Display
High Speed Oscilloscope Display
Digital Waveform Generator
Direct Digital Synthesis
Pinout
CA3338, CA3338A
(PDIP, SOIC)
TOP VIEW
PART
NUMBER
LINEARITY
(INL, DNL)
TEMP.
RANGE (°C)
PACKAGE
PKG.
DWG. #
CA3338E
±1.0 LSB
-40 to 85
16 Ld PDIP E16.3
CA3338EZ
(Note)
±1.0 LSB
-40 to 85
16 Ld PDIP
(Pb-free)
E16.3
CA3338AE
±0.75 LSB
-40 to 85
16 Ld PDIP E16.3
CA3338AEZ
(Note)
±0.75 LSB
-40 to 85
16 Ld PDIP
(Pb-free)
E16.3
CA3338M
±1.0 LSB
-40 to 85
16 Ld SOIC M16.3
CA3338MZ
(Note)
±1.0 LSB
-40 to 85
16 Ld SOIC
(Pb-free)
M16.3
CA3338AM
±0.75 LSB
-40 to 85
16 Ld SOIC M16.3
CA3338AMZ
(Note)
±0.75 LSB
-40 to 85
16 Ld SOIC
(Pb-free)
M16.3
Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which is compatible with both SnPb and Pb-free
soldering operations. Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J Std-020B.
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
D7
D6
D5
D4
D3
D2
VSS
D1
VDD
COMP
VREF+
VOUT
VREF-
VEE
D0
LE
FN1850.4
CA3338, CA3338A
Data Sheet
July 2004
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