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参数资料
| 型号： | CA95C09-20CN |
| 元件分类： | 加密电路 |
| 英文描述： | TELECOM, DATA ENCRYPTION CIRCUIT, PQCC44 |
| 封装： | PLASTIC, LCC-44 |
| 文件页数： | 41/42页 |
| 文件大小： | 180K |
| 代理商： | CA95C09-20CN |
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CA95C68/18/09
Tundra Semiconductor Corporation
3-32
Tundra Semiconductor Corporation
AUX7 –K/D
32
36
30
I
Key/Data: In Direct Control Mode, when this signal goes HIGH, the DCP
initiates a key-data input sequence as if a Clear E (or D) Key through the
Master Port command had been entered. The level on AUX6-E/D will
determine whether the subsequently entered clear-key bytes are written into
the E Key Register (E/D HIGH) or the D Key Register (E/D LOW).
AUX7-K/D and AUX5-S/S are mutually exclusive control lines. When one
goes active HIGH, the other must be inactive (LOW) and remain in this state
until the rst signal returns to an inactive state. Whenever a transition occurs
on C/K (switching between Direct Control Mode and Multiplexed Control
Mode) both of these signals must be inactive (LOW).
AUX2 –
8993O
Busy: In Direct Control Mode, this active LOW status output gives a
hardware indication that the ciphering algorithm is in operation. This status
line is driven by the BSY bit in the Status Register, such that when the BSY
bit is “1” (active), AUX2-
is LOW.
AUX3 –
9
10104
0
Command Pending: In Direct Control Mode, this active LOW status output
gives a hardware indication that the DCP is ready to accept input of key
bytes following a LOW-to-HIGH transition on AUX7-K/D. This signal line is
driven by the
bit in the Status Register, such that when the
bit is “1”
(active), AUX3-
is LOW.
11
12
13
7
I
Auxiliary Port Strobe: The rising edge of
strobes the key-data on
pins AUX7-AUX0 into the appropriate internal key register in Multiplexed
Control Mode (C/K LOW). This input is ignored unless
and C/K are
both LOW. One byte of key-data (most signicant byte rst) is entered on
each
.
Table 3-2 : Pin Description Cont'd
Symbol
95C68/18
95C09
TYPE
Name and Function
PDIP
PLCC
TQFP
BSY
CP
ASTB
AFLG
ASTB
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