参数资料
型号: CAT1161WI-42-T3
厂商: ON Semiconductor
文件页数: 3/13页
文件大小: 0K
描述: IC SUPERVISOR W/MEM 4.25V 8SOIC
标准包装: 1
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 高有效/低有效
复位超时: 最小为 130 ms
电压 - 阀值: 4.25V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 标准包装
产品目录页面: 806 (CN2011-ZH PDF)
其它名称: CAT1161WI-42-T3DKR
CAT1161, CAT1162
SPECIFICATIONS
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameters
Temperature Under Bias
Storage Temperature
Voltage on any Pin with Respect to Ground (Note 1)
V CC with Respect to Ground
Package Power Dissipation Capability (T A = 25 ° C)
Lead Soldering Temperature (10 sec)
Output Short Circuit Current (Note 2)
Ratings
–55 to +125
–65 to +150
? 2.0 to V CC + 2.0
? 2.0 to 7.0
1.0
300
100
Units
° C
° C
V
V
W
° C
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The minimum DC input voltage is –0.5 V. During transitions, inputs may undershoot to –2.0 V for periods of less than 20 ns. Maximum
DC voltage on output pins is V CC +0.5 V, which may overshoot to V CC +2.0 V for periods of less than 20 ns.
2. Output shorted for no more than one second. No more than one output shorted at a time.
Table 3. RELIABILITY CHARACTERISTICS
Symbol
N END (Note 3)
T DR (Note 3)
V ZAP (Note 3)
I LTH (Notes 3 & 4)
Parameter
Endurance
Data Retention
ESD Susceptibility
Latch ? Up
Reference Test Method
MIL ? STD ? 883, Test Method 1033
MIL ? STD ? 883, Test Method 1008
MIL ? STD ? 883, Test Method 3015
JEDEC Standard 17
Min
1,000,000
100
2000
100
Max
Units
Cycles/Byte
Years
Volts
mA
3. This parameter is tested initially and after a design or process change that affects the parameter.
4. Latch ? up protection is provided for stresses up to 100 mA on address and data pins from –1 V to V CC +1 V.
Table 4. D.C. OPERATING CHARACTERISTICS
V CC = 2.7 V to 6 V, unless otherwise specified.
Symbol
I CC
I SB
Parameter
Power Supply Current
Standby Current
Test Conditions
f SCL = 100 kHz
V CC = 3.3 V
Min
Typ
Max
3
40
Units
mA
m A
V CC = 5 V
50
m A
I LI
I LO
V IL
V IH
V OL1
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage (SDA)
V IN = GND or V CC
V IN = GND or V CC
I OL = 3 mA, V CC = 3.0 V
? 1
V CC x 0.7
2
10
V CC x 0.3
V CC + 0.5
0.4
m A
m A
V
V
V
Table 5. CAPACITANCE
T A = 25 ° C, f = 1.0 MHz, V CC = 5 V
Symbol
C I/O (Note 3)
C IN (Note 3)
Test
Input/Output Capacitance (SDA)
Input Capacitance (SCL)
Test Conditions
V I/O = 0 V
V IN = 0 V
Max
8
6
Units
pF
pF
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