参数资料
| 型号： | CAT24C64WI-GT3 |
| 厂商： | ON Semiconductor |
| 文件页数： | 5/15页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 64KBIT 400KHZ 8SOIC |
| 标准包装： | 1 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 64K (8K x 8) |
| 速度： | 400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 标准包装 |
| 产品目录页面： | 807 (CN2011-ZH PDF) |
| 其它名称： | CAT24C64WI-GT3DKR |
CAT24C64
BUS RELEASE DELAY (TRANSMITTER)
BUS RELEASE DELAY (RECEIVER)
SCL FROM
MASTER
1
8
9
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
START
ACK DELAY ( ≤ t AA )
Figure 4. Acknowledge Timing
ACK SETUP ( ≥ t SU:DAT )
SCL
t F
t LOW
t HIGH
t LOW
t R
t SU:STA
t HD:STA
t HD:DAT
t SU:DAT
t SU:STO
SDA IN
t AA
t DH
t BUF
SDA OUT
Figure 5. Bus Timing
WRITE OPERATIONS
Byte Write
To write data to memory, the Master creates a START
condition on the bus and then broadcasts a Slave address
with the R/W bit set to ‘0’. The Master then sends two
address bytes and a data byte and concludes the session by
creating a STOP condition on the bus. The Slave responds
with ACK after every byte sent by the Master (Figure 6). The
STOP starts the internal Write cycle, and while this
operation is in progress (t WR ), the SDA output is tri ? stated
and the Slave does not acknowledge the Master (Figure 7).
Page Write
The Byte Write operation can be expanded to Page Write,
by sending more than one data byte to the Slave before
issuing the STOP condition (Figure 8). Up to 32 (Note 10)
distinct data bytes can be loaded into the internal Page Write
Buffer starting at the address provided by the Master. The
page address is latched, and as long as the Master keeps
sending data, the internal byte address is incremented up to
the end of page, where it then wraps around (within the
page). New data can therefore replace data loaded earlier.
Following the STOP, data loaded during the Page Write
session will be written to memory in a single internal Write
cycle (t WR ).
Acknowledge Polling
As soon (and as long) as internal Write is in progress, the
Slave will not acknowledge the Master. This feature enables
the Master to immediately follow ? up with a new Read or
Write request, rather than wait for the maximum specified
Write time (t WR ) to elapse. Upon receiving a NoACK
response from the Slave, the Master simply repeats the
request until the Slave responds with ACK.
Hardware Write Protection
With the WP pin held HIGH, the entire memory is
protected against Write operations. If the WP pin is left
floating or is grounded, it has no impact on the Write
operation. The state of the WP pin is strobed on the last
falling edge of SCL immediately preceding the 1 st data byte
(Figure 9). If the WP pin is HIGH during the strobe interval,
the Slave will not acknowledge the data byte and the Write
request will be rejected.
Delivery State
The CAT24C64 is shipped erased, i.e., all bytes are FFh.
10. CAT24C64 Rev. D (Not Recommended for New Designs)
has 64 ? Byte Page Write Buffer.
http://onsemi.com
5
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CAT24C64WI-GT3JN | 功能描述:电可擦除可编程只读存储器 64KB I2C SER 电可擦除可编程只读存储器 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| CAT24C64XI | 制造商:Catalyst Semiconductor 功能描述: |
| CAT24C64XI-T2 | 制造商:ON Semiconductor 功能描述:EEPROM 64KBIT I2C 8-SOIC R 制造商:ON Semiconductor 功能描述:EEPROM, 64KBIT, I2C, 8-SOIC, REEL |
| CAT24C64YGI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT24C64YI-G | 功能描述:电可擦除可编程只读存储器 (8192x8) 64K 1.8-5.5 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
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