参数资料
| 型号： | CAT25256VI-G |
| 厂商： | ON Semiconductor |
| 文件页数： | 9/20页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 256KBIT 10MHZ 8SOIC |
| 标准包装： | 100 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 256K (32K x 8) |
| 速度： | 10MHz |
| 接口： | SPI 3 线串行 |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 管件 |
| 产品目录页面： | 808 (CN2011-ZH PDF) |
CAT25256
Byte Write
Once the WEL bit is set, the user may execute a write
sequence, by sending a WRITE instruction, a 16 ? bit address
and data as shown in Figure 5. Only 15 significant address
bits are used by the CAT25256. The 16th address bit is don’t
care, as shown in Table 14. Internal programming will start
after the low to high CS transition. During an internal write
cycle, all commands, except for RDSR (Read Status
Register) will be ignored. The RDY bit will indicate if the
internal write cycle is in progress (RDY high), or the device
is ready to accept commands (RDY low).
Page Write
After sending the first data byte to the CAT25256, the host
may continue sending data, up to a total of 64 bytes,
according to timing shown in Figure 6. After each data byte,
the lower order address bits are automatically incremented,
while the higher order address bits (page address) remain
unchanged. If during this process the end of page is
exceeded, then loading will “roll over” to the first byte in the
page, thus possibly overwriting previously loaded data.
Following completion of the write cycle, the CAT25256 is
Table 14. BYTE ADDRESS
automatically returned to the write disable state. While the
internal write cycle is in progress, the RDSR command will
output the RDY (Ready) bit status only (i.e., data out = FFh).
Write Identification Page
The additional 64 ? byte Identification Page (IP) can be
written with user data using the same Write commands
sequence as used for Page Write to the main memory array
(Figure 6). The IPL bit from the Status Register must be set
(IPL = 1) using the WRSR instruction, before attempting
to write to the IP.
The address bits [A15:A6] are Don’t Care and the
[A5:A0] bits define the byte address within the
Identification Page. In addition, the Byte Address must point
to a location outside the protected area defined by the BP1,
BP0 bits from the Status Register. When the full memory
array is write protected (BP1, BP0 = 1,1), the write
instruction to the IP is not accepted and not executed.
Also, the write to the IP is not accepted if the LIP bit from
the Status Register is set to 1 (the page is locked in
Read ? only mode).
Address Significant Bits
Address Don’t Care Bits
# Address Clock Pulses
Main Memory Array
Identification Page*
A14 ? A0
A5 ? A0
A15
A15 ? A6
16
16
*New Product only.
CS
0
1
2
3
4
5
6
7
8
21
22 23
24
25
26 27
28
29
30 31
SCK
OPCODE
BYTE ADDRESS*
DATA IN
SI
0
0
0
0
0
0
1
0
A N
A 0 D7 D6 D5 D4 D3 D2 D1 D0
SO
HIGH IMPEDANCE
Dashed Line = mode (1, 1)
* Please check the Byte Address Table (Table 14)
Figure 5. Byte WRITE Timing
CS
0
1
2
3
4
5
6
7
8
21
22
23 24 ? 31 3 2 ? 39 24+(N ? 1)x8 ? 1 .. 24+(N ? 1)x8
SCK
24+Nx8 ? 1
OPCODE
BYTE ADDRESS*
DATA IN
Data Byte N
SI
0
0
0
0
0
0
1
0
A N
A 0
Data Data Data
Byte 1 Byte 2 Byte 3
7..1
0
SO
Dashed Line = mode (1, 1)
HIGH IMPEDANCE
* Please check the Byte Address Table (Table 14)
Figure 6. Page WRITE Timing
http://onsemi.com
9
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CAT25256VI-G | 制造商:ON Semiconductor 功能描述:IC EEPROM 256KBIT SERIAL 10MHZ SOIC-8 |
| CAT25256VI-GT3 | 功能描述:电可擦除可编程只读存储器 256K SPI Serial CMOS 电可擦除可编程只读存储器 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| CAT25256XE | 制造商:ON Semiconductor 功能描述: |
| CAT25256XE-T2 | 制造商:ON Semiconductor 功能描述:256KB SPI SER CMOS EEPROM - Tape and Reel |
| CAT25256XI | 功能描述:电可擦除可编程只读存储器 (32kx8) 256K SPI 1.8 to 5.5V RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
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