参数资料
型号: CAT28F001G-12TT
厂商: ON Semiconductor
文件页数: 3/18页
文件大小: 0K
描述: IC FLASH 1MBIT 120NS 32PLCC
产品变化通告: Product Obsolescence 05/Oct/2010
标准包装: 500
格式 - 存储器: 闪存
存储器类型: FLASH
存储容量: 1M (128K x 8)
速度: 120ns
接口: 并联
电源电压: 4.5 V ~ 5.5 V
工作温度: 0°C ~ 70°C
封装/外壳: 32-LCC(J 形引线)
供应商设备封装: 32-PLCC(11.43x13.97)
包装: 带卷 (TR)
CAT28F001
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias ................... –55 ° C to +95 ° C
Storage Temperature ....................... –65 ° C to +150 ° C
Voltage on Any Pin with
Respect to Ground (1) ........... –2.0V to +V CC + 2.0V
(Except A 9 , RP , OE , V CC and V PP )
Voltage on Pin A 9 , RP AND OE with
Respect to Ground (1) ................... –2.0V to +13.5V
V PP with Respect to Ground
during Program/Erase (1) .............. –2.0V to +14.0V
V CC with Respect to Ground (1) ............ –2.0V to +7.0V
Package Power Dissipation
Capability (T A = 25 ° C) .................................. 1.0 W
Lead Soldering Temperature (10 secs) ............ 300 ° C
Output Short Circuit Current (2) ........................ 100 mA
RELIABILITY CHARACTERISTICS
*COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of
the device at these or any other conditions outside of those
listed in the operational sections of this specification is not
implied. Exposure to any absolute maximum rating for
extended periods may affect device performance and
reliability.
Symbol
Parameter
Min.
Max.
Units
Test Method
N END
(3)
Endurance
100K
Cycles/Byte
MIL-STD-883, Test Method 1033
T DR(3)
V ZAP(3)
I LTH(3)(4)
Data Retention
ESD Susceptibility
Latch-Up
10
2000
100
Years
Volts
mA
MIL-STD-883, Test Method 1008
MIL-STD-883, Test Method 3015
JEDEC Standard 17
CAPACITANCE T A = 25 ° C, f = 1.0 MHz
Limits
Symbol
C IN(3)
Test
Input Pin Capacitance
Min
Max.
8
Units
pF
Conditions
V IN = 0V
C OUT
(3)
Output Pin Capacitance
12
pF
V OUT = 0V
C VPP(3)
V PP Supply Capacitance
25
pF
V PP = 0V
Note:
(1) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC
voltage on output pins is V CC +0.5V, which may overshoot to V CC + 2.0V for periods of less than 20ns.
(2) Output shorted for no more than one second. No more than one output shorted at a time.
(3) This parameter is tested initially and after a design or process change that affects the parameter.
(4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to V CC +1V.
? 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
3
Doc. No. MD-1078, Rev. K
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