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参数资料
| 型号： | CAT28LV256NA-25T |
| 元件分类： | PROM |
| 英文描述： | 32K X 8 EEPROM 3V, 250 ns, PQCC32 |
| 封装： | PLASTIC, LCC-32 |
| 文件页数： | 10/12页 |
| 文件大小： | 66K |
| 代理商： | CAT28LV256NA-25T |
CAT28LV256
7
Doc. No. 1071, Rev. B
OE
CE
WE
ADDRESS
I/O
tWP
tBLC
BYTE 0
BYTE 1
BYTE 2
BYTE n
BYTE n+1
BYTE n+2
LAST BYTE
tWC
ADDRESS
CE
OE
WE
DATA OUT
tAS
DATA IN
DATA VALID
HIGH-Z
tAH
tWC
tOEH
tDH
tDS
tOES
tBLC
tCH
tCS
tCW
Page Write
The page write mode of the CAT28LV256 (essentially
an extended BYTE WRITE mode) allows from 1 to 64
bytes of data to be programmed within a single E2PROM
write cycle. This effectively reduces the byte-write time
by a factor of 64.
Following an initial WRITE operation (
WE pulsed low, for
tWP, and then high) the page write mode can begin by
issuing sequential
WE pulses, which load the address
and data bytes into a 64 byte temporary buffer. The page
address where data is to be written, specified by bits A6
to A14, is latched on the last falling edge of WE. Each
byte within the page is defined by address bits A0 to A5
(which can be loaded in any order) during the first and
subsequent write cycles. Each successive byte load
cycle must begin within tBLC MAX of the rising edge of the
preceding
WE pulse. There is no page write window
limitation as long as
WE is pulsed low within tBLC MAX.
Upon completion of the page write sequence,
WE must
stay high a minimum of tBLC MAX for the internal auto-
matic program cycle to commence. This programming
cycle consists of an erase cycle, which erases any data
that existed in each addressed cell, and a write cycle,
which writes new data back into the cell. A page write will
only write data to the locations that were addressed and
will not rewrite the entire page.
Figure 5. Byte Write Cycle [
CE
CE Controlled]
28LV256 F08
Figure 6. Page Mode Write Cycle
28LV256 F09
相关PDF资料 |
PDF描述 |
|---|---|
| CAT28LV256NI-20 | 32K X 8 EEPROM 3V, 200 ns, PQCC32 |
| CAT28LV256P-35 | 32K X 8 EEPROM 3V, 350 ns, PDIP28 |
| CAT29F150N-15B | 13 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs |
| CAT29F150N-15T | 18 Output, 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs |
| CAT29F150N-20B | x8 Flash EEPROM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CAT28LV256NI25 | 制造商:Catalyst Semiconductor 功能描述: |
| CAT28LV256NI-25 | 功能描述:电可擦除可编程只读存储器 (32kx8) 256K 3V RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| CAT28LV256NI-30 | 功能描述:电可擦除可编程只读存储器 (32kx8) 256K 3V RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| CAT28LV256P-25 | 功能描述:电可擦除可编程只读存储器 (32kx8) 256K 3V RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| CAT28LV256P-30 | 功能描述:电可擦除可编程只读存储器 (32kx8) 256K 3V RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
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