参数资料
型号: CAT28LV65WI25
厂商: ON Semiconductor
文件页数: 10/15页
文件大小: 0K
描述: IC EEPROM 64KBIT 250NS 28SOIC
产品变化通告: Product Discontinuation 30/Sept/2011
标准包装: 27
格式 - 存储器: EEPROMs - 并行
存储器类型: EEPROM
存储容量: 64K (8K x 8)
速度: 250ns
接口: 并联
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
供应商设备封装: 28-SOIC
包装: 管件
其它名称: 28LV65WI-25
CAT28LV65WI-25
CAT28LV65WI-25-ND
CAT28LV65
Software Data Protection
To activate the software data protection, the device must
be sent three write commands to specific addresses with
specific data (Figure 10). This sequence of commands
(along with subsequent writes) must adhere to the page write
timing specifications (Figure 12). Once this is done, all
subsequent byte or page writes to the device must be
preceded by this same set of write commands. The data
protection mechanism is activated until a deactivate
sequence is issued regardless of power on/off transitions.
This gives the user added inadvertent write protection on
power ? up in addition to the hardware protection provided.
To allow the user the ability to program the device with an
EEPROM programmer (or for testing purposes) there is a
software command sequence for deactivating the data
protection. The six step algorithm (Figure 11) will reset the
internal protection circuitry, and the device will return to
standard operating mode (Figure 13 provides reset timing).
After the sixth byte of this reset sequence has been issued,
standard byte or page writing can commence.
DATA
ADDRESS
CE
AA
1555
55
0AAA
A0
1555
BYTE OR
PAGE
t WC
t WP
t BLC
WRITES
ENABLED
WE
Figure 12. Software Data Protection Timing
DATA
ADDRESS
AA
1555
55
0AAA
80
1555
AA
1555
55
0AAA
20
1555
t WC
SDP
RESET
CE
DEVICE
UNPROTECTED
WE
Figure 13. Resetting Software Data Protection Timing
http://onsemi.com
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