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参数资料
| 型号： | CD40100BDMSR |
| 厂商： | INTERSIL CORP |
| 元件分类： | 计数移位寄存器 |
| 英文描述： | 32-BIT BIDIRECTIONAL SERIAL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP16 |
| 封装： | BRAZE SEALED, CERAMIC, DIP-16 |
| 文件页数： | 9/9页 |
| 文件大小： | 65K |
| 代理商： | CD40100BDMSR |
7-1285
CD40100BMS
FIGURE 8. TYPICAL DYNAMIC POWER DISSIPATION AS A FUNCTION OF CLOCK FREQUENCY
Timing Diagram
FIGURE 9. TIMING DIAGRAM DEFINING SETUP, HOLD, AND PROPAGATION DELAY TIMES
Chip Dimensions and Pad Layout
Typical Performance Characteristics (Continued)
8
6
4
2
CLOCK INPUT FREQUENCY (fCL) (KHz)
1
6
4
2
103
POWER
DISSIP
A
TION
(PD)
(
W)
SUPPLY VOLTAGE (VDD) = 15V
10V
5V
104
105
102
AMBIENT
TEMPERA
TURE
(T
A
)=
+25
o
C
LOAD
CAP
ACIT
ANCE
(RL)
=
200K
8
6
4
2
8
6
4
2
8
6
4
2
8
6
4
2
10
8
6
4
28
6
4
28
6
4
2
102
103
104
INPUT
RISE
&
F
ALL
TIME
(tr
,tf)
=
20ns
CL = 50pF
CL =15pF
CLOCK
INPUT
OUTPUT
tWH
tWL
tS
tH
tPHL
Dimensions in parenthesis are in millimeters and are derived from
the basic inch dimensions as indicated. Grid graduations are in mils
(10-3 inch).
METALLIZATION:
Thickness: 11k
14k, AL.
PASSIVATION:
10.4k - 15.6k
, Silane
BOND PADS:
0.004 inches X 0.004 inches MIN
DIE THICKNESS:
0.0198 inches - 0.0218 inches
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CD40100BF/3 | 制造商:Harris Corporation 功能描述: |
| CD40100BMS | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:CMOS 32-Stage Static Left/Right Shift Register |
| CD40101BD | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述: |
| CD40101BFS2225 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CD40101BFX | 制造商:Harris Corporation 功能描述: |
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