参数资料
型号: CDB4365
厂商: Cirrus Logic Inc
文件页数: 32/52页
文件大小: 0K
描述: EVALUATION BOARD FOR CS4365
标准包装: 1
DAC 的数量: 6
位数: 24
采样率(每秒): 192k
数据接口: 串行
DAC 型: 电压
工作温度: -40°C ~ 85°C
已供物品: 板,缆线,CD
已用 IC / 零件: CS4365
相关产品: CS4365-DQZR-ND - IC DAC 6CH 114DB 192KHZ 48-LQFP
CS4365-DQZ-ND - IC DAC 6CH 114DB 192KHZ 48-LQFP
598-1060-ND - IC DAC 6CH 114DB 192KHZ 48LQFP
其它名称: 598-1779
CS4365
4.14.3 SPI Mode
In SPI Mode, data is clocked into the serial control data line, CDIN, by the serial control port clock, CCLK
(see Figure 23 for the clock to data relationship). There is no AD0 pin. Pin CS is the chip select signal and
is used to control SPI writes to the control port. When the device detects a high to low transition on the
AD0/CS pin after power-up, SPI Mode will be selected. All signals are inputs and data is clocked in on the
rising edge of CCLK.
4.14.3.1 SPI Write
To write to the device, follow the procedure below while adhering to the control port Switching Specifica-
tions in Section .
1. Bring CS low.
2. The address byte on the CDIN pin must then be 00110000.
3. Write to the memory address pointer, MAP. This byte points to the register to be written.
4. Write the desired data to the register pointed to by the MAP.
5. If the INCR bit (see Section 4.14.1 ) is set to 1, repeat the previous step until all the desired registers
are written, then bring CS high.
6. If the INCR bit is set to 0 and further SPI writes to other registers are desired, it is necessary to bring
CS high, and follow the procedure detailed from step 1. If no further writes to other registers are de-
sired, bring CS high.
CS
CCLK
CHIP
ADDRESS
MAP
DATA
C DIN
0011000
R/W
MSB
LSB
byte 1
byte n
M AP = M em ory Address Pointer
Figure 23. Control Port Timing, SPI Mode
4.15
Memory Address Pointer (MAP)
7
INCR
0
6
Reserved
0
5
Reserved
0
4
MAP4
0
3
MAP3
0
2
MAP2
0
1
MAP1
0
0
MAP0
0
4.15.1 INCR (Auto Map Increment Enable)
Default = ‘0’
0 - Disabled
1 - Enabled
4.15.2 MAP4-0 (Memory Address Pointer)
Default = ‘00000’
32
DS670F2
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