参数资料
型号: CDB5346
厂商: Cirrus Logic Inc
文件页数: 22/38页
文件大小: 0K
描述: BOARD EVAL FOR CS5346
标准包装: 1
ADC 的数量: 2
位数: 24
采样率(每秒): 192k
数据接口: 串行
输入范围: 3.15 Vpp
在以下条件下的电源(标准): 205mW @ 192kSPS
工作温度: -40°C ~ 85°C
已用 IC / 零件: CS5346
已供物品: 板,缆线,CD
产品目录页面: 756 (CN2011-ZH PDF)
相关产品: CS5346-CQZR-ND - IC ADC AUD 103DB 200KHZ 48-LQFP
598-1692-ND - IC ADC AUD 103DB 200KHZ 48LQFP
其它名称: 598-1790
DS861PP3
29
CS5346
7.3
ADC Control - Address 04h
7.3.1
Functional Mode (Bits 7:6)
Function:
Selects the required range of sample rates.
7.3.2
Digital Interface Format (Bit 4)
Function:
The required relationship between LRCK, SCLK and SDOUT is defined by the Digital Interface Format
bit. The options are detailed in Table 7 and may be seen in Figure 3 and Figure 4.
7.3.3
Mute (Bit 2)
Function:
When this bit is set, the serial audio output of the both channels is muted.
7.3.4
High-Pass Filter Freeze (Bit 1)
Function:
When this bit is set, the internal high-pass filter is disabled. The current DC offset value will be frozen and
continue to be subtracted from the conversion result. See “High-Pass Filter and DCOffset Calibration” on
7.3.5
Master / Slave Mode (Bit 0)
Function:
This bit selects either master or slave operation for the serial audio port. Setting this bit selects Master
Mode, while clearing this bit selects Slave Mode.
7
65
432
10
FM1
FM0
Reserved
DIF
Reserved
Mute
HPFFreeze
M/S
FM1
FM0
Mode
0
Single-Speed Mode: 8 to 50 kHz sample rates
0
1
Double-Speed Mode: 50 to 100 kHz sample rates
1
0
Quad-Speed Mode: 100 to 200 kHz sample rates
11
Reserved
Table 6. Functional Mode Selection
DIF
Description
Format
Figure
0
Left-Justified (default)
0
1IS
1
Table 7. Digital Interface Formats
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