参数资料
型号: CDB5524
厂商: Cirrus Logic Inc
文件页数: 4/28页
文件大小: 0K
描述: EVAL BOARD FOR CS5524 ADC
标准包装: 1
ADC 的数量: 1
位数: 24
采样率(每秒): 617
数据接口: 串行
输入范围: 0 ~ 5 V
在以下条件下的电源(标准): 10.1mW @ 15SPS,5 V
工作温度: -40°C ~ 85°C
已用 IC / 零件: CS5524
已供物品: 板,缆线,CD
相关产品: CS5524-ASZR-ND - IC ADC 24BIT 4CH 24-SSOP
598-1106-5-ND - IC ADC 24BIT 4CH 20SSOP
其它名称: 598-1012

CDB5521/22/23/24/28
1. PART I: HARDWARE
1.1 Introduction
The CDB5521/22/23/24/28 evaluation board pro-
vides a means of testing the CS5521/22/23/24/28
Analog-to-Digital Converters (ADCs). The board
interfaces the converters to an IBM TM compatible
PC via an RS-232 interface while operating from a
+5 V and -5 V power supply. To accomplish this,
the board comes equipped with an 80C51 micro-
controller and a 9-pin RS-232 cable, which physi-
cally interfaces the evaluation board to the PC.
Additionally, analysis software provides easy ac-
cess to the internal registers of the converters and
provides a means to capture data and display the
converters’ time domain, frequency domain, and
noise histogram performance.
1.2 Evaluation Board Overview
The board is partitioned into two main sections: an-
alog and digital. The analog section consists of the
either the CS5521, CS5522, CS5523, CS5524 or
CS5528, a precision voltage reference, and the cir-
cuitry to generate a negative voltage. The digital
section consists of the 80C51 microcontroller, the
hardware test switches, the reset circuitry, and the
RS-232 interface.
The CS5521/22/23/24/28 is designed to digitize
low level signals while operating from a
32.768 KHz crystal. As shown in Figures 1 and 2,
a thermocouple can be connected to the converter’s
inputs via J1’s AIN+ and AIN- inputs. Note, a sim-
ple RC network filters the thermocouple’s output to
4
reduce any interference picked up by the thermo-
couple leads.
The evaluation board provides two voltage refer-
ence options, on-board and external. With HDR5’s
jumpers in positions 1 and 4, the LT1019 provides
2.5 volts (the LT1019 was chosen for its low drift,
typically 5ppm/°C). By setting HDR5’s jumpers to
position 2 and 3, the user can supply an external
voltage reference to J2’s REF+ and REF- inputs
(Application Note 4 on the web details various
voltage references).
The A/D converters’ serial interfaces are SPI TM
and MICROWIRE TM compatible. The interface
control lines (CS, SDI, SDO, and SCLK) are con-
nected to the 80C51 microcontroller via port one.
To interface a different microcontroller to the ADC
chip, the control lines to the ADC are available at
HDR6 (Header 6). However, to connect an external
microcontroller to the header, the evaluation board
must be modified in one of three ways: 1) cut the
interface control traces going to the on-board
80C51 microcontroller, 2) remove resistors R1-R6,
or 3) remove the 80C51 microcontroller from its
socket on the evaluation board.
Figure 3 illustrates the schematic of the digital sec-
tion. It contains the microcontroller, a Motorola
MC145407 interface chip, and test switches. The
test switches aid in debugging communication
problems between the CDB5521/22/23/24/28 and
the PC. The microcontroller derives its clock from
an 11.0592 MHz crystal. From this, the controller
is configured to communicate via RS-232 at
9600 baud, no parity, 8-bit data, and 1 stop bit.
DS317DB2
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