参数资料
型号: CDB5524
厂商: Cirrus Logic Inc
文件页数: 8/28页
文件大小: 0K
描述: EVAL BOARD FOR CS5524 ADC
标准包装: 1
ADC 的数量: 1
位数: 24
采样率(每秒): 617
数据接口: 串行
输入范围: 0 ~ 5 V
在以下条件下的电源(标准): 10.1mW @ 15SPS,5 V
工作温度: -40°C ~ 85°C
已用 IC / 零件: CS5524
已供物品: 板,缆线,CD
相关产品: CS5524-ASZR-ND - IC ADC 24BIT 4CH 24-SSOP
598-1106-5-ND - IC ADC 24BIT 4CH 20SSOP
其它名称: 598-1012
CDB5521/22/23/24/28
1.3 Using the Evaluation Board
The CS5521/22/23/24/28 are highly integrated
of this document in Figures 12, 13, and 14 for ref-
erence.
ADCs. They contain a multiplexer, an instrumenta-
1.4.
Power Connections
tion amplifier (IA), a programmable gain amplifier
(PGA), an on-chip charge pump drive (CPD), and
programmable output word rates (OWR). The IA
provides a set gain of 20 while the PGA sets the in-
put levels of the ADC at either 25 mV, 55 mV,
100 mV, 1 V, 2.5 V, or 5 V (for VREF = 2.5 V).
The CPD provides a square wave output. This out-
put, along with two diodes and two capacitors, is
used to supply the negative supply to the IA, en-
abling measurements of ground referenced signals.
The ADC’s digital filter allows the user to select
output word rates (OWR’s) from 1.88 Hz up to
101 Hz. higher output word rates can be attained
when a faster clock source is used. Since the
CS5521/22/23/24/28 have such a high degree of in-
tegration and flexibility, the CS5521/23 or
CS5522/24/28 data sheet should be read thorough-
ly before and consulted during the use of the
CDB5521/22/23/24/28. Table 1 lists the different
headers on the CDB5521/22/23/24/28 and their
functions. The locations of these headers are
marked on the top of the board, and the silkscreen
and layout of the board can also be found at the end
Figure 4 illustrates the power supply connections to
the evaluation board. The +5 V Analog supplies the
analog section of the evaluation board, the LT1019
and the ADC. The -5 V Analog supplies the nega-
tive bias voltage circuitry. The +5 V Digital sup-
plies a separate five volts to the digital section of
the evaluation board, the 80C51, the reset circuitry,
and the RS-232 interface circuitry.
1.5 Negative Bias Voltage
The evaluation board provides three means of sup-
plying the Negative Bias Voltage (NBV). HDR4
(Header 4) selects between them. When HRD4 is in
position one, the LM337 supplies NBV with an ad-
justable voltage. R16 is used to adjust this voltage
between -1.25 V and -5 V. When in position two,
HDR4 grounds NBV. And by setting HDR4 to po-
sition three, the converter’s Charge Pump Drive
provides NBV with a dc rectified voltage, nominal-
ly -2.1 V.
Note: NBV should not exceed a voltage more
negative than -3.0 V.
+5V Analog
+5V Analog
+5V Digital
+5V Digital
Z3
P6KE6V8P
+
C8
47 μF
C13
0.1μF
Z2
P6KE6V8P
+
C6
47μF
C12
0.1μF
AGND
DGND
Z1
P6KE6V8P
-5V Analog
+
C5
47μF
C10
0.1μF
-5V Analog
Figure 4. Power Supplies
8
DS317DB2
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