参数资料
型号: CDK5581
厂商: Cirrus Logic Inc
文件页数: 1/32页
文件大小: 0K
描述: KIT BOARD FOR CDB5581 ADC
标准包装: 1
系列: CapturePLUS™II
ADC 的数量: 1
位数: 16
采样率(每秒): 200k
数据接口: 串行
输入范围: ±2.048 V
在以下条件下的电源(标准): 85mW @ 200kSPS
工作温度: -40°C ~ 85°C
已用 IC / 零件: CS5581
已供物品: 2 个板,线缆,CD,电源
产品目录页面: 756 (CN2011-ZH PDF)
相关产品: 598-1272-5-ND - IC ADC 16BIT 1CH 200KSPS 24SSOP
其它名称: 598-1574
3/25/08
15:11
CS5581
± 2.5 V / 5 V, 200 kSps, 16-bit, High-throughput ADC
Features & Description
Single-ended Analog Input
On-chip Buffers for High Input Impedance
Conversion Time = 5 μ S
Settles in One Conversion
Linearity Error = 0.0008%
Signal-to-Noise = 80 dB
S/(N + D) = 80 dB
DNL = ±0.1 LSB Max.
Simple three/four-wire serial interface
Power Supply Configurations:
- Analog: +5V/GND; IO: +1.8V to +3.3V
- Analog: ±2.5V; IO: +1.8V to +3.3V
Power Consumption:
- ADC Input Buffers On: 85 mW
- ADC Input Buffers Off: 60 mW
General Description
The CS5581 is a single-channel, 16-bit analog-to-digital
converter capable of 200 kSps conversion rate. The input
accepts a single-ended analog input signal. On-chip buff-
ers provide high input impedance for both the AIN input
and the VREF+ input. This significantly reduces the drive
requirements of signal sources and reduces errors due to
source impedances. The CS5581 is a delta-sigma convert-
er capable of switching multiple input channels at a high
rate with no loss in throughput. The ADC uses a low-laten-
cy digital filter architecture. The filter is designed for fast
settling and settles to full accuracy in one conversion. The
converter's 16-bit data output is in serial format, with the
serial port acting as either a master or a slave. The convert-
er is designed to support bipolar, ground-referenced
signals when operated from ±2.5V analog supplies.
The converter can operate from an analog supply of 0-5V
or from ±2.5V. The digital interface supports standard logic
operating from 1.8, 2.5, or 3.3 V.
ORDERING INFORMATION:
VREF+
VREF-
V1+
V2+
CS5581
VL
SMODE
CS
ADC
DIGITAL
FILTER
SERIAL
INTERFACE
SCLK
LOGIC
AIN
ACOM
BUFEN
OSC/CLOCK
GENERATOR
DIGITAL CONTROL
SDO
RDY
RST
CONV
BP/UP
MCLK
V1-
V2-
TST
DCR
VLR
VLR2
VLR3
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright ? Cirrus Logic, Inc. 2008
(All Rights Reserved)
MAR ‘08
DS796PP1
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