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参数资料
| 型号： | CDB5526 |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 9/30页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR CS5526 |
| 标准包装： | 1 |
| ADC 的数量： | 1 |
| 位数： | 20 |
| 采样率（每秒）： | 606 |
| 数据接口： | 串行 |
| 输入范围： | ±2.5 V |
| 在以下条件下的电源（标准）： | 9.4mW @ 15SPS，5 V |
| 工作温度： | -40°C ~ 85°C |
| 已用 IC / 零件： | CS5526 |
| 已供物品： | 板，CD |
| 相关产品： | CS5526-BSZR-ND - IC ADC 20BIT W/4BIT LATCH 20SSOP 598-1108-5-ND - IC ADC 20BIT W/4BIT LATCH 20SSOP |
| 其它名称： | 598-1014 |
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CS5525 CS5526
DS202F5
17
The offset and gain calibration steps each take one
conversion cycle to complete. At the end of the cal-
ibration step, the calibration control bits will be set
back to logic 0, and the DF (Done Flag) bit will be
set to a logic 1. For the combination self-calibra-
tion (CC2-CC0= 011; offset followed by gain), the
calibration will take two conversion cycles to com-
plete and will set the DF bit after the gain calibra-
tion is completed. The DF bit will be cleared any
time the data register, the offset register, the gain
register, or the setup register is read. Reading the
configuration register alone will not clear the DF
bit.
Self Calibration
The CS5525/26 offer both self offset and self gain
calibrations. For the self-calibration of offset in the
25 mV, 55 mV, and 100 mv ranges, the converter
internally ties the inputs of the instrumentation am-
plifier together and routes them to the AIN- pin as
shown in Figure 10. For proper self-calibration of
offset to occur in the 25 mV, 55 mV, and 100 mV
ranges, the AIN- pin must be at the proper com-
mon-mode-voltage (i.e. AIN- = 0V, NBV must be
between -1.8 V to -2.5 V). For self-calibration of
offset in the 1.0 V, 2.5 V, and 5 V ranges, the inputs
of the modulator are connected together and then
routed to the VREF- pin as shown in Figure 11.
For self-calibration of gain, the differential inputs
of the modulator are connected to VREF+ and
Table 3.
Table 4. Offset and Gain Registers
Offset Register
One LSB represents 2-24 proportion of the input span (bipolar span is 2 times unipolar span)
Offset and data word bits align by MSB (bit MSB-4 of offset register changes bit MSB-4 of data)
Gain Register
The gain register span is from 0 to (2-2-23). After Reset the MSB = 1, all other bits are 0.
MSB
LSB
Register
Sign
2-2
2-3
2-4
2-5
2-6
2-19
2-20
2-21
2-22
2-23
2-24
Reset (R)
0
000000
MSB
LSB
Register
20
2-1
2-2
2-3
2-4
2-5
2-18
2-19
2-20
2-21
2-22
2-23
Reset (R)
1
0
000000
≈
AIN+
AIN-
S1
OPEN
S2
CLOSED
+
-
X20
+
-
Figure 10. Self Calibration of Offset (Low Ranges).
AIN+
AIN-
S1
OPEN
+
-
X20
+
-
S2
OPEN
S4
CLOSED
VREF-
S3
CLOSED
Figure 11. Self Calibration of Offset (High Ranges).
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相关代理商/技术参数 |
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| CDB5528 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:Evaluation Board and Software |
| CDB5529 | 功能描述:EVAL BOARD FOR CS5529 RoHS:否 类别:编程器，开发系统 >> 评估板 - 模数转换器 (ADC) 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- ADC 的数量:1 位数:12 采样率（每秒）:94.4k 数据接口:USB 输入范围:±VREF/2 在以下条件下的电源（标准）:- 工作温度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，软件 |
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| CDB5534U | 功能描述:数据转换 IC 开发工具 Eval Bd 24Bit ADC w/ Ultra Low-Noise USB RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V |
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