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参数资料
| 型号： | CGY2014TT |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 衰减器 |
| 英文描述： | GSM/DCS/PCS power amplifier(GSM/DCS/PCS 功率放大器) |
| 中文描述： | 880 MHz - 915 MHz RF/MICROWAVE NARROW BAND LOW POWER AMPLIFIER |
| 封装： | PLASTIC, HTSSOP-20 |
| 文件页数： | 4/16页 |
| 文件大小： | 98K |
| 代理商： | CGY2014TT |
2000 Apr 11
4
Philips Semiconductors
Preliminary specification
GSM/DCS/PCS power amplifier
CGY2014TT
PINNING
SYMBOL
PIN
DESCRIPTION
n.c.
RFI
HB
V
DD1HB
V
DD2HB
V
DD2HB
V
DD2LB
V
DD1LB
GND1
LB
RFI
LB
n.c.
n.c.
n.c.
RFO/V
DD3LB
RFO/V
DD3LB
GND
n.c.
RFO/V
DD3HB
RFO/V
DD3HB
n.c.
n.c.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
not connected
DCS/PCS power amplifier input
DCS/PCS first stage supply voltage
DCS/PCS second stage supply voltage
DCS/PCS second stage supply voltage
GSM second stage supply voltage
GSM first stage supply voltage
GSM first stage ground
GSM power amplifier input
not connected
not connected
not connected
GSM power amplifier output and third stage supply voltage
GSM power amplifier output and third stage supply voltage
ground
internal connection to ground; pin should not be connected to the board
DCS/PCS power amplifier output and third stage supply voltage
DCS/PCS power amplifier output and third stage supply voltage
not connected
not connected
ground
exposed die
FUNCTIONAL DESCRIPTION
Operating conditions
The CGY2014TT is designed to meet the European
Telecommunications Standards Institute (ETSI) GSM
documents, the “ETS 300 577 specification” which are
defined as follows:
t
on
= 570
μ
s
T = 4.16 ms
Duty cycle
δ
=
1
/
8
.
Multislot operation can be implemented provided that the
application circuit does not drive the IC beyond the limiting
values.
Power amplifier
The GSM and DCS/PCS power amplifiers consist of three
cascaded gain stages with an open-drain configuration.
Each drain has to be loaded externally by an adequate
reactive circuit which also has to be a DC path to the
supply.
handbook, halfpage
CGY2014TT
FCA181
1
2
3
4
5
6
7
8
9
10
n.c.
RFIHB
VDD1HB
VDD2HB
VDD2HB
VDD2LB
VDD1LB
GND1LB
RFILB
n.c.
n.c.
n.c.
RFO/VDD3HB
RFO/VDD3HB
n.c.
GND
RFO/VDD3LB
RFO/VDD3LB
n.c.
n.c.
20
19
18
17
16
15
14
13
12
11
Fig.2 Pin configuration.
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