- 您现在的位置：买卖IC网 > PDF目录378445 > CH5101A (Electronic Theatre Controls, Inc.) CMOS Monochrome Digital Video Camera PDF资料下载
参数资料
| 型号： | CH5101A |
| 厂商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS Monochrome Digital Video Camera |
| 中文描述： | 单色的CMOS数码摄像机 |
| 文件页数： | 12/32页 |
| 文件大小： | 132K |
| 代理商： | CH5101A |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页当前第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页
12
201-0000-033 Rev 1.0, 6/2/99
CHRONTEL
CH5101A
Write: After writing data into a register, the address register will automatically be incremented
by one.
Read: Before loading data from a register to the on-chip temporary register (getting ready to
be serially read), the address register will automatically be incremented by one.
However, for the first read after an RAB, the address register will not be changed.
0:
Auto-increment disabled (alternating mode).
Write: After writing data into a register, the address register will remain unchanged until a new
RAB is written.
Read: Before loading data from a register to the on-chip temporary register (getting ready to
be serially read), the address register will remain unchanged.
AR[5:0]
Specifies the Address of the Register to be Accessed
.
This register address is loaded into the address register of the CH5101. The R/W* access, which
follows, is directed to the register specified by the content stored in the address register.
The following two sections describe the operation of the serial interface for the four combinations of R/W* = 0,1
and AutoInc = 0,1.
CH5101 Write Cycle Protocols (R/W* = 0)
Data transfer with acknowledge is required. The acknowledge-related clock pulse is generated by the
mastertransmitter. The mastertransmitter releases the SD line (HIGH) during the acknowledge clock pulse. The
slave-receiver must pull down the SD line, during the acknowledge clock pulse, so that it remains stable LOW
during the HIGH period of the clock pulse. The CH5101 always acknowledges for writes (see
Figure 7
). Note that
the resultant state on SD is the wired-AND of data outputs from the transmitter and receiver
.
Figure 7: Acknowledge on the Bus
Table 4. Register Address Byte (RAB)
B7
B6
B5
B4
B3
B2
B1
B0
X
AutoInc
AR[5]
AR[4]
AR[3]
AR[2]
AR[1]
AR[0]
SC from
Master
SD Data Output
By the CH5101
Start
Condition
2
SD Data Output
By Master-Transmitter
1
8
9
not acknowledge
acknowledge
clock pulse for
acknowledgment
相关PDF资料 |
PDF描述 |
|---|---|
| CH5101A-L | CMOS Monochrome Digital Video Camera |
| CH7003B-T | Digital PC to TV Encoder |
| CH7003B | Digital PC to TV Encoder |
| CH7003B-V | Digital PC to TV Encoder |
| CH7006C | MODULE |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CH5101A-L | 制造商:未知厂家 制造商全称:未知厂家 功能描述:CMOS Monochrome Digital Video Camera |
| CH5101A-Q | 制造商:未知厂家 制造商全称:未知厂家 功能描述:CMOS Monochrome Digital Video Camera |
| CH511H-30PT | 制造商:CHENMKO 制造商全称:Chenmko Enterprise Co. Ltd. 功能描述:SCHOTTKY BARRIER DIODE VOLTAGE 30 Volts CURRENT 1.0 Ampere |
| CH511H-40PT | 制造商:CHENMKO 制造商全称:Chenmko Enterprise Co. Ltd. 功能描述:SCHOTTKY BARRIER DIODE VOLTAGE 40 Volts CURRENT 1.0 Ampere |
| CH5125C6W | 制造商:Cooper Crouse-Hinds 功能描述: |
发布紧急采购，3分钟左右您将得到回复。