参数资料
型号: CH5101A
厂商: Electronic Theatre Controls, Inc.
英文描述: CMOS Monochrome Digital Video Camera
中文描述: 单色的CMOS数码摄像机
文件页数: 8/32页
文件大小: 132K
代理商: CH5101A
8
201-0000-033 Rev 1.0, 6/2/99
CHRONTEL
CH5101A
A/D Conversion:
The data out of the programmable sample and hold is input to an 8-bit A/D. The output of the A/D is sent to the
datapath section, and can alternatively be sent directly to the Y[7:0] pins. The A/D has an over-range output which
is available as an external pin.
Programmable Gamma correction:
The monochrome signals are next applied to a gamma correction block with selectable gamma settings of 1.0, 1.6
and 2.2, controlled via GAM[1:0].
Interpolate/Decimate data to desired resolution:
The output resolution is determined by the mode register bits M[2:0].
When a CCIR601 mode is selected (M[2:0] = 4,5), a signal compatible with Chrontel's CH7202 input will be gener-
ated. This entails interpolating the luminance signal by a factor of two, and selecting the 8-bit output mode (register
00h, bit 0). The value of 128 is substituted for chrominance data (no color).
When a CIF output is selected (M[2:0] = 1), the value of 128 is substituted for chrominance data.
When QCIF output is selected (M[2:0] = 3), the Y resolution will be decimated by a factor of two in both horizontal
and vertical directions. This requires bandlimiting the Y data, decimating in the horizontal direction. The Y data is
not decimated in the vertical direction.Automatic Shutter, Gain and Black Setting:
Automatic Shutter, Gain and Black Setting:
The CH5101 contains circuitry to automatically adjust the shutter (ESLE, ESLH and ESLL), programmable gain
(PGSH[2:0]) and black level (BCLMP[7:0]. These feedback loops are independently controlled by the three control
bits Auto-Shutter Shutter Enable (ASSE), Auto-Shutter Gain Enable (ASGE) and Auto-Shutter Black Enable
(ASBE). When each of these loops is enabled (default), a read to the corresponding shutter, gain or black level
register will result is a readout of the control signal the algorithm has determined to be correct. Data can continue to
be written to the control registers, but will not have an effect until the automatic feedback control is disabled. The
feedback loops will attempt to force a percentage of the image (controlled by ASBC[4:0] and ASBT[2:0]) to black,
and a certain percentage of the image (controlled by ASWC[7:0]) inside the selectable window to white. This will
create an output image which maximizes the dynamic range of the signal, without creating overflow or underflow
problems within the A/D or the datapath.
Timing signal generation:
The CH5101 generates all required internal and external timing signals. The following timing signals are output by
the CH5101:
Clock out (CLKOUT) - This output is used to latch the outputs of the Y]7:0], HS*, VS* and HREF.
Horizontal Sync (HS*) - The horizontal sync output is used to determine the start of a new line. Polarity is
selectable via control bit HSP.
Vertical Sync (VS*) - The vertical sync output is used to determine the start of a new frame. Polarity is
selectable via control bit VSP.
Horizontal Reference (HREF) - The horizontal reference is high when active data is output from the CH5101.
The following timing parameters are programmable:
Shutter - This control is divided among three registers, Electronic Shutter Length Extended (ESLE) ,
Electronic Shutter Length High (ESLH) and Electronic Shutter Length Low (ESLL). The control range is
from ~1uS, to just under the frame duration.
Frame rate - In non-CCIR601 modes, the frame rate is selectable via the FR register. The CH5101 has two
methods for adjusting the frame rate of the device.
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