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参数资料
| 型号： | CH7009A |
| 厂商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Chrontel CH7009 DVI / TV Output Device |
| 中文描述： | 昆泰CH7009和DVI / TV输出设备 |
| 文件页数： | 15/46页 |
| 文件大小： | 580K |
| 代理商： | CH7009A |
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201-0000-035 Rev 1.1, 5/8/2000
15
CHRONTEL
When IDF = 4 (YCrCb mode), the data inputs can also be used to transmit sync information to the device. In
this mode, the embedded sync will follow the VIP2 convention, and the first byte of the ‘video timing
reference code’ will be assumed to occur when a Cb sample would occur, if the video stream was continuous.
This is shown below:
CH7009A
I
n this mode, the S[7..0] byte contains the following data:
S[6]
=
F
=
1 during field 2, 0 during field 1
S[5]
=
V
=
1 during field blanking, 0 elsewhere
S[4]
=
H
=
1 during EAV (synchronization reference at the end of active video)
0 during SAV (synchronization reference at the start of active video)
Bits S[7] and S[3..0] are ignored
Hot Plug Detection
The CH7009 has the capability of signaling to the graphics controller when the termination of the DVI outputs
has changed. The operation of this circuit is as follows. The HPDET input pin of the CH7009 should be
connected to pin 16 of the DVI connector. When a DVI monitor is connected to the DVI connector, this pin
will be pulled high (above 2.4 volts). When a DVI monitor is not connected to the DVI connector, the internal
pull-down on the HPDET pin will pull low. The CH7009 will detect any transition at the HPDET pin. When
the HPIE (Hot Plug Interrupt Enable) bit in IIC register 1Eh is high, the CH7009 will pull low on the P-OUT /
TLDET* pin. When the HPIE2 (Hot Plug Interrupt Enable 2) bit in IIC register 20h is high, the CH7009 will
pull low on the GPIO[1] / TLDET* pin. This should signal the driver to read the DVIT bit in register 20h to
determine the state of the HPDET pin. The P-OUT / TLDET pin will continue to pull low until the driver sets
the HPIR (Hot Plug Interrupt Reset) bit in register 1Eh high. The driver should then set the HPIR bit low.
Table 8: Embedded Sync
IDF =
Format =
Pixel #
Bus Data
4
YCrCb 8-bit
P0a
FF
FF
FF
FF
FF
FF
FF
FF
P0b
00
00
00
00
00
00
00
00
P1a
00
00
00
00
00
00
00
00
P1b
S[7]
S[6]
S[5]
S[4]
S[3]
S[2]
S[1]
S[0]
P2a
Cb2[7]
Cb2[6]
Cb2[5]
Cb2[4]
Cb2[3]
Cb2[2]
Cb2[1]
Cb2[0]
P2b
Y2[7]
Y2[6]
Y2[5]
Y2[4]
Y2[3]
Y2[2]
Y2[1]
Y2[0]
P3a
Cr2[7]
Cr2[6]
Cr2[5]
Cr2[4]
Cr2[3]
Cr2[2]
Cr2[1]
Cr2[0]
P3b
Y3[7]
Y3[6]
Y3[5]
Y3[4]
Y3[3]
Y3[2]
Y3[1]
Y3[0]
Dx[7]
Dx[6]
Dx[5]
Dx[4]
Dx[3]
Dx[2]
Dx[1]
Dx[0]
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|---|---|
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CH7009A-T | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Chrontel CH7009 DVI / TV Output Device |
| CH7011A-T | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Consumer IC |
| CH7012 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Chrontel CH7012 TV Output Device |
| CH7012A | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Chrontel CH7012 TV Output Device |
| CH7012A-T | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Chrontel CH7012 TV Output Device |
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