参数资料
型号: CH7009A
厂商: Electronic Theatre Controls, Inc.
英文描述: Chrontel CH7009 DVI / TV Output Device
中文描述: 昆泰CH7009和DVI / TV输出设备
文件页数: 5/46页
文件大小: 580K
代理商: CH7009A
201-0000-035 Rev 1.1, 5/8/2000
5
CHRONTEL
Table 1: Pin Description
CH7009A
64-Pin
LQFP
46
# Pins
Type
Symbol
Description
1
Out
P-OUT /
TLDET*
Pixel Clock Output / DVI Link Detect Output
When the CH7009 is operating as a VGA to TV encoder in
master clock mode, this pin provides a pixel clock signal to the
VGA controller which is used as a reference frequency. The
output is selectable between 1X or 2X of the pixel clock
frequency. The output driver is driven from the DVDDV
supply. This output has a programmable tri-state. The
capacitive loading on this pin should be kept to a minimum.
When the CH7009 is operating as a DVI transmitter, this pin
provides an open drain output which pulls low when a
termination change has been detected on the HPDET input.
The output is released through IIC control.
Buffered Clock Output
This output pin provides a buffered clock output, driven by the
DVDD supply. The output clock can be selected using the BCO
register.
Composite / Horizontal Sync Output
This pin can be selected to output a TV composite sync, TV
horizontal sync, or a buffered version of the VGA horizontal
sync. The output is driven from the DVDD supply.
D[11] - D[0]
Data[11] through Data[0] Inputs
These pins accept the 12 data inputs from a digital video
port of a graphics controller. The levels are 0 to DVDDV,
and the VREF signal is used as the threshold level.
XCLK,
External Clock Inputs
These inputs form a differential clock signal input to the
CH7009 for use with the H, V, DE and D[11:0] data. If
differential clocks are not available, the XCLK* input
should be connected to VREF.
47
1
Out
BCO
48
1
Out
C/H SYNC
50 – 55,
58 – 63
12
In / Out
57, 56
2
In
XCLK*
The output clocks from this pad cell are able to have their
polarities reversed under the control of the MCP bit.
Digital Supply Voltage (3.3V)
Digital Ground
I/O Supply Voltage (3.3V to 1.1V)
DVI Transmitter Supply Voltage (3.3V)
DVI Transmitter Ground
PLL Supply Voltage (3.3V)
PLL Ground
DAC Supply Voltage (3.3V)
DAC Ground
1, 12, 49
6, 11, 64
45
23, 29
20, 26, 32
18, 44
16, 17, 41
33
34, 40
3
3
1
2
3
2
3
1
2
Power
Power
Power
Power
Power
Power
Power
Power
Power
DVDD
DGND
DVDDV
TVDD
TGND
AVDD
AGND
VDD
GND
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