- 您现在的位置：买卖IC网 > PDF目录16065 > CORE1553BRT-RM (Microsemi SoC)IP MODULE CORE1553 REMOTE TERM PDF资料下载
参数资料
| 型号： | CORE1553BRT-RM |
| 厂商： | Microsemi SoC |
| 文件页数： | 33/74页 |
| 文件大小： | 0K |
| 描述： | IP MODULE CORE1553 REMOTE TERM |
| 标准包装： | 1 |
| 系列： | * |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页当前第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页
Core1553BRT v4.0 Handbook
Error Detection
Table 5-5 ? Error Detection
Error Condition
Command Word
1. Parity or Manchester encoding errors
2. Incorrect SYNC waveform
Mode Codes
Action
Command is ignored.
No interrupt generated.
MSGERR in SW is set, and the SW is
1. Illegal mode code or invalid subaddress (from internal transmitted.
or external legality block)
Broadcast Data Commands
1. TX bit set in command word
Data Word
1. Parity or Manchester encoding errors
2. Incorrect number of words received
3. Data words are continuous.
4. Incorrect SYNC waveform
RT-to-RT
1. First command word must be RX.
Message Failure interrupt generated.
Data transfer is aborted.
MSGERR in SW is set, and the SW is
not transmitted.
Message Failure interrupt generated.
Data transfer is aborted.
MSGERR in SW is set, and the SW is
not transmitted.
Message Failure interrupt generated.
Data transfer is aborted.
MSGERR in SW is set, and the SW is
2. Second command word must be TX and non- not transmitted.
broadcast.
3. RX RT checks the TX SW and verifies the SYNC
pattern, RT address, MSGERR, and BUSY fields.
4. The first data word sync must be received within 57 μs
of the command word parity bit.
Transmit Data Error
Message Failure interrupt generated.
Data transfer is aborted.
1. The RT monitors its transmissions on the bus through MSGERR in SW is set, and the SW is
its decoder and verifies that the correct data is not transmitted.
transmitted with no Manchester or parity errors.
Backend Failure
Message Failure interrupt generated.
Data transfer is aborted.
1. The RT makes sure that the backend responds to MSGERR in SW is set, and the SW is
BUSY
read and write cycles within the required time.
not transmitted.
Message Failure interrupt generated.
Data transfer is aborted.
1. Backend RTBUSY input is active at any point during BUSY in SW is set, and the SW is
the message.
Transmitter Overrun
1. Transmits for greater than 668 μs. The internal state
machines prevent this from happening, but the core
includes the required timer and functionality. This is
implemented separately to the encoder to provide
complete protection.
Revision 3
transmitted.
Message Failure interrupt generated.
Core shuts down transmissions on bus.
33
相关PDF资料 |
PDF描述 |
|---|---|
| M1DXK-6036R | IDC CABLE - MKR60K/MC60M/X |
| HMC06DREN-S13 | CONN EDGECARD 12POS .100 EXTEND |
| M1BXK-6036R | IDC CABLE - MSR60K/MC60M/X |
| M3DMK-1660K | IDC CABLE - MKR16K/MC16F/MCG16K |
| M3UYK-4006R | IDC CABLE - MKS40K/MC40M/MPD40K |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CORE1553BRT-RMFL | 功能描述:IP MODULE CORE1553 BUS/REMOTE 制造商:microsemi corporation 系列:- 零件状态:在售 类型:许可证 应用:- 版本:- 许可长度:- 许可 - 用户明细:- 操作系统:- 配套使用产品/相关产品:Microsemi 器件 媒体分发类型:- 标准包装:1 |
| CORE1553BRT-UR | 制造商:Microsemi Corporation 功能描述:SOFTWARE - Virtual or Non-Physical Inventory (Software & Literature) |
| CORE1553-DEV-KIT | 功能描述:KIT DEVELOPMENT FOR IP CORE1553 RoHS:否 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:Fusion® 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA |
| CORE1553-DEV-KIT-2 | 制造商:Microsemi Corporation 功能描述:EVAL KIT FOR CORE1553BRM - Boxed Product (Development Kits) 制造商:Microsemi Corporation 功能描述:KIT DEVELOPMENT FOR IP CORE1553 |
| CORE1553-SA | 功能描述:HARDWARE FOR IP CORE1553 RoHS:否 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:- 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA |
发布紧急采购，3分钟左右您将得到回复。