参数资料
| 型号： | CS2841BEDR14G |
| 厂商： | ON Semiconductor |
| 文件页数： | 3/10页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BST FLYBK CM 14SOIC |
| 产品变化通告： | Product Obsolescence 19/Jun/2009 |
| 标准包装： | 1 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 52kHz |
| 占空比： | 95% |
| 电源电压： | 7.8 V ~ 25 V |
| 降压： | 无 |
| 升压： | 是 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 14-SOIC（0.154"，3.90mm 宽） |
| 包装： | 剪切带 (CT) |
| 其它名称： | CS2841BEDR14GOSCT |
CS2841B
ELECTRICAL CHARACTERISTICS (-40 ° C ≤ T A ≤ 85 ° C, R T = 680 k W , C T = 0.022 m F for Triangular Mode, V CC = 15 V (Note 3),
R T = 10 k W , C T = 3.3 nF for Sawtooth Mode (see Figure 7); unless otherwise specified.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
Reference Section
Output Voltage
Line Regulation
Load Regulation
Temperature Stability
Total Output Variation
Output Noise Voltage
Long Term Stability
Output Short Circuit
T J = 25 ° C, I OUT = 1.0 mA
8.4 ≤ V CC ≤ 16 V
1.0 ≤ I OUT ≤ 20 mA
Note 4
Line, Load, Temp. Note 4
10 Hz ≤ f ≤ 10 kHz, T J = 25 ° C. Note 4
T A = 125 ° C, 1000 Hrs. Note 4
T A = 25 ° C
4.9
-
-
-
4.82
-
-
-30
5.0
6.0
6.0
0.2
-
50
5.0
-100
5.1
20
25
0.4
5.18
-
25
-180
V
mV
mV
mV/ ° C
V
m V
mV
mA
Oscillator Section
Initial Accuracy
Voltage Stability
Temperature Stability
Amplitude
Discharge Current
Sawtooth Mode: T J = 25 ° C. See Figure 7.
Sawtooth Mode: -40 ° C ≤ T A ≤ +85 ° C
Triangular Mode: T J =25 ° C. See Figure 7.
8.4 ≤ V CC ≤ 16 V
Sawtooth Mode: T MIN ≤ T A ≤ T MAX . Note 4
Triangular Mode: T MIN ≤ T A ≤ T MAX . Note 4
V OSC (Peak to Peak)
T J = 25 ° C
T MIN ≤ T A ≤ T MAX
47
44
44
-
-
-
-
7.4
7.2
52
52
52
0.2
5.0
8.0
1.7
8.3
-
57
60
60
1.0
-
-
-
9.2
9.4
kHz
kHz
kHz
%
%
%
V
mA
mA
Error Amp Section
Input Voltage
Input Bias Current
A VOL
Unity Gain Bandwidth
PSRR
Output Sink Current
Output Source Current
V OUT High
V OUT Low
V COMP = 2.5 V
V FB = 0 V
2.0 ≤ V OUT ≤ 4.0 V
Note 4
8.4 V ≤ V CC ≤ 16 V
V FB = 2.7 V, V COMP = 1.1 V
V FB = 2.3 V, V COMP = 5.0 V
V FB = 2.3 V, R L = 15 k W to Ground
V FB = 2.7 V, R L = 15 k W to V REF
2.42
-
65
0.7
60
2.0
-0.5
5.0
-
2.5
-0.3
90
1.0
70
6.0
-0.8
6.0
0.7
2.58
-2.0
-
-
-
-
-
-
1.1
V
m A
dB
MHz
dB
mA
mA
V
V
Current Sense Section
Gain
Maximum Input Signal
PSRR
Input Bias Current
Delay to Output
Notes 5 and 6
V COMP = 5.0 V. Note 5
12 V ≤ V CC ≤ 25 V. Note 5
V Sense = 0 V
T J = 25 ° C. Note 4
2.85
0.9
-
-
-
3.0
1.0
70
-2.0
150
3.15
1.1
-
-10
300
V/V
V
dB
m A
ns
3.
4.
5.
6.
Adjust V CC above the start threshold before setting at 15 V
These parameters, although guaranteed, are not 100% tested in production
Parameter measured at trip point of latch with V FB = 0
Gain defined as:
A +
D VCOMP
D VSense
; 0 v VSense v 0.8 V.
http://onsemi.com
3
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