参数资料
型号: CS4205-KQZ
厂商: Cirrus Logic Inc
文件页数: 5/81页
文件大小: 0K
描述: IC CODEC AC97 I2S 48-LQFP
标准包装: 250
类型: 音频编解码器 '97
数据接口: 串行
分辨率(位): 18,20 b
ADC / DAC 数量: 1 / 2
三角积分调变:
动态范围,标准 ADC / DAC (db): 90 / 90
电压 - 电源,模拟: 4.75 V ~ 5.25 V
电压 - 电源,数字: 4.75 V ~ 5.25 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-TQFP(9x9)
包装: 托盘
产品目录页面: 754 (CN2011-ZH PDF)
其它名称: 598-1182
CS4205
DS489PP4
13
2. GENERAL DESCRIPTION
The CS4205 is a mixed-signal serial audio codec
compliant with the Intel Audio Codec ’97 Specifi-
cation, revision 2.1 [6] (referred to as AC ’97). It is
designed to be paired with a digital controller, typ-
ically located on the PCI bus or integrated within
the system core logic chip set. The controller is re-
sponsible for all communications between the
CS4205 and the remainder of the system. The
CS4205 contains two distinct functional sections:
digital and analog. The digital section includes the
AC-link interface, S/PDIF interface, serial data
port, GPIO, signal processing engine, ZV Port,
power management support, and Sample Rate Con-
verters (SRCs). The analog section includes the an-
alog input multiplexer (mux), stereo input mixer,
stereo output mixer, mono output mixer, stereo An-
alog-to-Digital Converters (ADCs), stereo Digi-
tal-to-Analog Converters (DACs), dedicated mono
microphone ADC, and their associated volume
controls.
2.1
AC-Link
All communication with the CS4205 is established
with a 5-wire digital interface to the controller
called the AC-link. This interface is shown in
Figure 7. All clocking for the serial communication
is synchronous to the BIT_CLK signal. BIT_CLK
is generated by the primary audio codec and is used
to clock the controller and any secondary audio co-
decs. Both input and output AC-link audio frames
are organized as a sequence of 256 serial bits form-
ing 13 groups referred to as ‘slots’. During each au-
dio frame, data is passed bi-directionally between
the CS4205 and the controller. The input frame is
driven from the CS4205 on the SDATA_IN line.
The output frame is driven from the controller on
the SDATA_OUT line. The controller is also re-
sponsible for issuing reset commands via the RE-
SET# signal. Following a Cold Reset, the CS4205
is responsible for notifying the controller that it is
ready for operation after synchronizing its internal
functions. The CS4205 AC-link signals must use
the same digital supply voltage as the controller, ei-
ther +5 V or +3.3 V. See Section 4, AC-Link Frame
Definition, for detailed AC-link information.
CODEC
SYNC
BIT_CLK
SDATA_OUT
SDATA_IN
RESET#
Digital AC'97
Controller
AC'97
Figure 7. AC-link Connections
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