参数资料
| 型号： | CS4341-CZZ |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 14/34页 |
| 文件大小： | 0K |
| 描述： | IC DAC STER 24BIT 96KHZ 16TSSOP |
| 标准包装： | 96 |
| 位数： | 24 |
| 数据接口： | 串行 |
| 转换器数目： | 2 |
| 电压电源： | 单电源 |
| 功率耗散（最大）： | 90mW |
| 工作温度： | -10°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 16-TSSOP |
| 包装： | 管件 |
| 输出数目和类型： | 2 电压，单极 |
| 采样率（每秒）： | 96k |
| 产品目录页面： | 756 (CN2011-ZH PDF) |
| 其它名称： | 598-1050-5 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页当前第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页
CS4341
DS298F5
21
4.9.1
Rise Time for Control Port Clock
When excess capacitive loading is present on the IC clock line, pin 6 (SCL/CCLK) may not have
sufficient hysteresis to meet the standard IC rise time specification. This prevents the use of com-
mon IC configurations with a resistor pull-up. A workaround is achieved by placing a Schmitt Trig-
ger buffer, a 74HC14 for example, on the SCL line just prior to the CS4341. This will not affect the
operation of the IC bus as pin 6 is an input only.
4.9.2
Memory Address Pointer (MAP)
The MAP byte precedes the control port register byte during a write operation and is not available
again until after a start condition is initiated. During a read operation the byte transmitted after the
ACK will contain the data of the register pointed to by the MAP (see section 4.9.3 for write/read
details).
4.9.2a
INCR (Auto Map Increment)
The device has a MAP auto increment capability enabled by the INCR bit (the MSB) of the MAP.
If INCR is set to 0, MAP will stay constant for successive IC writes or reads and SPI writes. If INCR
is set to 1, MAP will auto increment after each byte is written, allowing block reads or writes of suc-
cessive registers.
Default = ‘0’
0 - Disabled
1 - Enabled
4.9.2b
MAP0-3 (Memory Address Pointer)
Default = ‘0000’
4.9.3
IC Mode
In the IC Mode, data is clocked into and out of the bi-directional serial control data line, SDA, by
the serial control port clock, SCL. There is no CS pin. Pin AD0 enables the user to alter the chip
address (001000[AD0][R/W]) and should be tied to VA or AGND as required, before powering up
the device. If the device ever detects a high to low transition on the AD0/CS pin after power-up,
SPI mode will be selected.
7
654
32
10
INCR
Reserved
MAP3
MAP2
MAP1
MAP0
0
000
00
Pin 6
VA
SC L
Figure 21. IC Buffer Example
相关PDF资料 |
PDF描述 |
|---|---|
| CS4341A-KSZ | IC DAC STER 24BIT 192KHZ 16SOIC |
| CS4351-DZZ | IC DAC STER 112DB 192KHZ 20TSSOP |
| CS4352-DZZ | IC DAC STER 102DB 192KHZ 20TSSOP |
| CS4354-CSZ | IC DAC 24BIT SRL 14SOIC |
| CS4360-KZZ | IC DAC STER 6CH 102DB 28TSSOP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CS4341-CZZR | 功能描述:数模转换器- DAC IC 24bit 96kHz 101dB Stereo DAC w/VC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| CS4341-KS | 功能描述:数模转换器- DAC 24-bit 96kHz 101dB Stereo DAC w/VC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| CS4341-KSR | 功能描述:数模转换器- DAC 24-bit 96kHz 101dB Stereo DAC w/VC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| CS4341-KSZ | 制造商:Cirrus Logic 功能描述:24-BIT, 96 KHZ STEREO DAC WITH VOL CNTRL - Bulk 制造商:Cirrus Logic 功能描述:IC DAC 24BIT SRL 96KHZ 16-SOIC 制造商:Cirrus Logic 功能描述:24Bit 96kHz 101dB Stereo DAC |
| CS4341-KSZR | 制造商:Cirrus Logic 功能描述:DAC DUAL DELTA-SIGMA 24BIT 16SOIC - Tape and Reel |
发布紧急采购，3分钟左右您将得到回复。