参数资料
型号: CS4360-DZZ
厂商: Cirrus Logic Inc
文件页数: 19/37页
文件大小: 0K
描述: IC DAC STER 6CH 102DB 28TSSOP
标准包装: 50
位数: 24
数据接口: 串行
转换器数目: 6
电压电源: 模拟和数字
功率耗散(最大): 265mW
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 28-TSSOP
包装: 管件
输出数目和类型: 6 电压,单极
采样率(每秒): 192k
其它名称: 598-1056-5
CS4360
26
DS517F2
4.9.1
Memory Address Pointer (MAP)
The MAP byte precedes the control port register byte during a write operation and is not available again
until after a start condition is initiated. During a read operation the byte transmitted after the ACK will con-
tain the data of the register pointed to by the MAP (see sections 4.9.1a and 4.9.3 for write/read details).
4.9.1a
INCR (Auto Map Increment)
The device has MAP auto increment capability enabled by the INCR bit (the MSB) of the MAP. If INCR is
set to 0, MAP will stay constant for successive IC writes or reads and SPI writes. If INCR is set to 1, MAP
will auto increment after each byte is written, allowing block reads or writes of successive registers.
Default = ‘0’
0 - Disabled
1 - Enabled
4.9.1b
MAP0-3 (Memory Address Pointer)
Default = ‘0000’
4.9.2
IC Mode
In the IC mode, data is clocked into and out of the bi-directional serial control data line, SDA, by the serial
control port clock, SCL. There is no CS pin. Pin AD0 enables the user to alter the chip address
(001000[AD0][R/W]) and should be tied to VLC or GND as required, before powering up the device. If the
device ever detects a high-to-low transition on the AD0/CS pin after power-up, SPI mode will be selected.
4.9.2a
IC Write
To write to the device, follow the procedure below while adhering to the control port Switching Specifica-
tions in section 3.
1) Initiate a START condition to the IC bus followed by the address byte. The upper 6 bits must be
001000. The seventh bit must match the setting of the AD0 pin, and the eighth must be 0. The eighth
bit of the address byte is the R/W bit.
2) Wait for an acknowledge (ACK) from the device, then write to the memory address pointer, MAP. This
byte points to the register to be written.
3) Wait for an acknowledge (ACK) from the device, then write the desired data to the register pointed to
by the MAP.
4) If the INCR bit (see section 4.9.1a) is set to 1, repeat the previous step until all the desired registers
are written, then initiate a STOP condition to the bus.
5) If the INCR bit is set to 0 and further IC writes to other registers are desired, it is necessary to repeat
the procedure detailed from step 1. If no further writes to other registers are desired, initiate a STOP
condition to the bus.
76543
210
INCR
Reserved
MAP3
MAP2
MAP1
MAP0
00000
000
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