参数资料
型号: CS4364-CQZ
厂商: Cirrus Logic Inc
文件页数: 28/50页
文件大小: 0K
描述: IC DAC 103DB 24BIT 6CH 48-LQFP
标准包装: 250
位数: 24
数据接口: 串行
转换器数目: 8
电压电源: 模拟和数字
功率耗散(最大): 520mW
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 托盘
输出数目和类型: 8 电压,单极
采样率(每秒): 216k
产品目录页面: 757 (CN2011-ZH PDF)
配用: CDB4364-ND - EVALUATION BOARD FOR CS4364
其它名称: 598-1059
34
DS619F1
CS4364
6.2.3
PCM/DSD Selection (DSD/PCM)
Default = 0
0 - PCM
1 - DSD
Function:
This function selects DSD or PCM Mode. The appropriate data and clocks should be present before
changing modes, or else MUTE should be selected.
6.2.4
DAC Pair Disable (DACx_DIS)
Default = 0
0 - DAC Pair x Enabled
1 - DAC Pair x Disabled
Function:
When the bit is set, the respective DAC channel pair (AOUTAx and AOUTBx) will remain in a reset state.
It is advised that changes to these bits be made while the power-down (PDN) bit is enabled to eliminate
the possibility of audible artifacts.
6.2.5
Power Down (PDN)
Default = 1
0 - Disabled
1 - Enabled
Function:
The entire device will enter a low-power state when this function is enabled, and the contents of the control
registers are retained in this mode. The power-down bit defaults to ‘enabled’ on power-up and must be
disabled before normal operation in Control Port Mode can occur.
6.3
PCM Control (Address 03h)
6.3.1
Digital Interface Format (DIF)
Default = 0000 - Format 0 (Left Justified, up to 24-bit data)
Function:
These bits select the interface format for the serial audio input. The DSD/PCM bit determines whether
PCM or DSD Mode is selected.
The required relationship between the Left/Right clock, serial clock and serial data is defined by the Digital
Interface Format and the options are detailed in Figures 8-15.
Note:
While in PCM Mode, the DIF bits should only be changed when the power-down (PDN) bit is set
to ensure proper switching from one mode to another.
76
543
21
0
DIF3
DIF2
DIF1
DIF0
Reserved
FM1
FM0
00
000
01
1
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