参数资料
| 型号： | CS53L21-CNZR |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 13/26页 |
| 文件大小： | 0K |
| 描述： | IC ADC STEREO 24BIT 98DB 32-QFN |
| 标准包装： | 6,000 |
| 位数： | 24 |
| 采样率（每秒）： | 100k |
| 数据接口： | 串行 |
| 转换器数目： | 2 |
| 功率耗散（最大）： | 30mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -10°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-QFN |
| 供应商设备封装： | 32-QFN（5x5） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 3 个单端，单极 |
| 配用： | 598-1550-ND - BOARD EVAL FOR CS53L21 ADC |
BU2280FV, BU2360FV, BU2362FV
Technical Note
20/23
www.rohm.com
2012.02 - Rev.B
2012 ROHM Co., Ltd. All rights reserved.
●Example of application circuit
◎BU2360FV
Description of terminal
PIN No.
PIN name
PIN function
1
VDD2
Power supply for 27MHz
2
VSS2
GND for 27MHz
3
CLK27M1
27.0000MHz Clock output terminal 1 (CL=40pF)
4
CLK27M2
27.0000MHz Clock output terminal 2 (CL=25pF)
5
AVDD
Power supply for Analog block
6
AVSS
GND for Analog block
7
XTALIN
Crystal input terminal
8
XTALOUT
Crystal output terminal
9
CLK512FS2
FSEL=OPEN:24.5760MHz, FSEL=L:22.5792MHz
10
CLK512FS1
FSEL=OPEN:24.5760MHz, FSEL=L:22.5792MHz
11
DVSS
GND for Digital block
12
DVDD
Power supply for Digital block
13
CLK33M2
33.8688MHz Clock output terminal 2
14
FSEL
9, 10PIN output selection (with pull-up)
OPEN:24.5760MHz(9, 10PIN), L:22.5792MHz(9, 10PIN)
15
CLK33M1
33.8688MHz Clock output terminal 1
16
OE
Output enable (with pull-up), OPEN:enable, L:disable
Note) Basically, mount ICs to the printed circuit board for use.
(If the ICs are not mounted to the printed circuit board, the characteristics of ICs may not be fully demonstrated.)
Mount 0.1
F capacitors in the vicinity of the IC PINs between 1PIN (VDD2) and 2PIN (VSS2), 5PIN (AVDD) and 6PIN (AVSS), 11PIN (DVSS) and 12PIN
(DVDD), respectively.
Depending on the conditions of the printed circuit board, mount an additional electrolytic capacitor between the power supply and GND terminal.
For EMI protection, it is effective to put ferrite beads in the origin of power supply to be fed to BU2360FV from the printed circuit board or to insert a
capacitor (of 1
or less), which bypasses high frequency desired, between the power supply and the GND terminal.
13:CLK32M2
Fig.125
1:VDD2
16:OE
2:VSS2
15:CLK33M1
27.0000MHz
3:CLK27M1
14:FSEL
4: CLK27M2
5:AVDD
12:DVDD
6:AVSS
11:DVSS
7:XTALIN
10:CLK512FS1
8:XTALOUT
9:CLK512FS2
BU2360FV
27.0000MHz
0.1F
OPEN:Enable
L:Disable
33.8688MHz
OPEN:48.0kHz type
L:44.1kHz type
33.8688MHz
0.1F
24.5760MHz
or 22.5792MHz
24.5760MHz
or 22.5792MHz
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