参数资料
型号: CS8406-DZZ
厂商: Cirrus Logic Inc
文件页数: 16/28页
文件大小: 0K
描述: IC XMITTER DGTL 192KHZ 28TSSOP
标准包装: 50
类型: 数字音频接口发射器
应用: 车载音频
安装类型: 表面贴装
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 28-TSSOP
包装: 管件
产品目录页面: 759 (CN2011-ZH PDF)
配用: 598-1017-ND - BOARD EVAL FOR CS8416 RCVR
其它名称: 598-1722
DS580F6
23
CS8406
8.10 Interrupt 1 Mode MSB (0Ah) and Interrupt 1 Mode LSB (0Bh)
The two Interrupt Mode registers form a 2-bit code for each Interrupt Register 1 function. There are three
ways to set the INT pin active in accordance with the interrupt condition. In the Rising edge active mode,
the INT pin becomes active on the arrival of the interrupt condition. In the Falling edge active mode, the INT
pin becomes active on the removal of the interrupt condition. In Level active mode, the INT interrupt pin be-
comes active during the interrupt condition. Be aware that the active level (Active High or Low) only depends
on the INT[1:0] bits. These registers default to 00.
00 - Rising edge active
01 - Falling edge active
10 - Level active
11 - Reserved
8.11 Interrupt 2 Mask (0Ch)
The bits of this register serve as a mask for the Interrupt 2 register. If a mask bit is set to 1, the error is un-
masked, meaning that its occurrence will affect the INT pin and the status register. If a mask bit is set to 0,
the error is masked, meaning that its occurrence will not affect the INT pin or the status register. The bit
positions align with the corresponding bits in Interrupt 2 register. This register defaults to 00h.
8.12 Interrupt 2 Mode MSB (0Dh) and Interrupt Mode 2 LSB (0Eh)
The two Interrupt Mode registers form a 2-bit code for each Interrupt Register 1 function. There are three
ways to set the INT pin active in accordance with the interrupt condition. In the Rising edge active mode,
the INT pin becomes active on the arrival of the interrupt condition. In the Falling edge active mode, the INT
pin becomes active on the removal of the interrupt condition. In Level active mode, the INT interrupt pin be-
comes active during the interrupt condition. Be aware that the active level (Active High or Low) only depends
on the INT[1:0] bits. These registers default to 00.
00 - Rising edge active
01 - Falling edge active
10 - Level active
11 - Reserved
8.13 Channel Status Data Buffer Control (12h)
BSEL - Selects the data buffer register addresses to contain User data or Channel Status data
Default = ‘0’
0 - Data buffer address space contains Channel Status data
1 - Data buffer address space contains User data
76
5
4
3
2
1
0
TSLIP1
0
EFTC1
0
TSLIP0
0
EFTC0
0
76
5
4
3
2
1
0
00
0
EFTUM
0
76
5
4
3
2
1
0
00
0
EFTU1
0
00
0
EFTU0
0
76
5
4
3
2
1
0
0
BSEL
0
EFTCI
CAM
0
相关PDF资料
PDF描述
CS8415A-CZZ IC 96KHZ DGTL RCVR 28-TSSOP
CS8416-DZZ IC RCVR DGTL 192KHZ 28TSSOP AUTO
CS8420-DSZ IC CONV S/R DGTL AUDIO 28-SOIC
CS8421-CNZ IC SAMPLE RATE CONVERTER 20QFN
CS8427-DZZ IC TXRX DGTL AUDIO 96KHZ 28TSSOP
相关代理商/技术参数
参数描述
CS8406-DZZR 功能描述:音频发送器、接收器、收发器 IC 192 kHz Digital Audio Transmitter RoHS:否 制造商:Cirrus Logic 工作电源电压:3.3 V, 5 V 电源电流:11.8 mA 通道数量:1 最大工作温度:+ 70 C 接口类型:I2C, SPI 安装风格:SMD/SMT 封装 / 箱体:TSSOP-28 封装:
CS8406-IS 制造商:Rochester Electronics LLC 功能描述:- Bulk
CS8406-IZ 制造商:Rochester Electronics LLC 功能描述:- Bulk
CS841 制造商:HVPSI 制造商全称:High Voltage Power Solutions, Inc. 功能描述:MOV Modules
CS8411 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:DIGITAL AUDIO INTER FACE RECEIVER