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参数资料
| 型号： | CY28409AZXC |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 11/16页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK CK409GRANTSDALE 56TSSOP |
| 标准包装： | 35 |
| 类型： | * |
| PLL： | 是 |
| 输入： | 晶体 |
| 输出： | 时钟 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:21 |
| 差分 - 输入:输出： | 无/是 |
| 频率 - 最大： | 400MHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | * |
| 封装/外壳： | * |
| 供应商设备封装： | * |
| 包装： | * |
CY28409
........................Document #: 38-07445 Rev. *D Page 4 of 16
Control Registers
20:27
Byte Count – 8 bits
20
Repeat start
28
Acknowledge from slave
21:27
Slave address – 7 bits
29:36
Data byte 1 – 8 bits
28
Read = 1
37
Acknowledge from slave
29
Acknowledge from slave
38:45
Data byte 2 – 8 bits
30:37
Byte count from slave – 8 bits
46
Acknowledge from slave
38
Acknowledge from master
....
......................
39:46
Data byte from slave – 8 bits
....
Data Byte (N–1) – 8 bits
47
Acknowledge from master
....
Acknowledge from slave
48:55
Data byte from slave – 8 bits
....
Data Byte N – 8 bits
56
Acknowledge from master
....
Acknowledge from slave
....
Data byte N from slave – 8 bits
....
Stop
....
Acknowledge from master
....
Stop
Table 4. Block Read and Block Write Protocol (continued)
Block Write Protocol
Block Read Protocol
Bit
Description
Bit
Description
Table 5. Byte Read and Byte Write protocol
Byte Write Protocol
Byte Read Protocol
Bit
Description
Bit
Description
1
Start
1
Start
2:8
Slave address – 7 bits
2:8
Slave address – 7 bits
9
Write = 0
9
Write = 0
10
Acknowledge from slave
10
Acknowledge from slave
11:18
Command Code – 8 bits
'100xxxxx' stands for byte operation, bits[4:0] of the
command code represents the offset of the byte to
be accessed
11:18
Command Code – 8 bits
'100xxxxx' stands for byte operation, bits[4:0] of
the command code represents the offset of the
byte to be accessed
19
Acknowledge from slave
19
Acknowledge from slave
20:27
Data byte from master – 8 bits
20
Repeat start
28
Acknowledge from slave
21:27
Slave address – 7 bits
29
Stop
28
Read = 1
29
Acknowledge from slave
30:37
Data byte from slave – 8 bits
38
Acknowledge from master
39
Stop
Byte 0:Control Register 0
Bit
@Pup
Name
Description
7
0
Reserved
Reserved, Set = 0
61
PCIF
PCI
PCI Drive Strength Override
0 = Force All PCI and PCIF Outputs to Low Drive Strength
1 = Force All PCI and PCIF Outputs to High Drive Strength
5
0
Reserved
Reserved, Set = 0
4
0
Reserved
Reserved, Set = 0
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相关代理商/技术参数 |
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|---|---|
| CY28409AZXCT | 功能描述:时钟发生器及支持产品 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| CY28409OC | 功能描述:时钟合成器/抖动清除器 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| CY28409OCT | 功能描述:时钟合成器/抖动清除器 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| CY28409OCXT | 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential SRC and CPU Outputs |
| CY28409OXC | 功能描述:时钟合成器/抖动清除器 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
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