- 您现在的位置：买卖IC网 > PDF目录298975 > CY3764VP208-200UXC (Cypress Semiconductor Corp.) BATT SEALED LEAD ACID 12V 2.3AH PDF资料下载
参数资料
| 型号： | CY3764VP208-200UXC |
| 厂商： | Cypress Semiconductor Corp. |
| 英文描述： | BATT SEALED LEAD ACID 12V 2.3AH |
| 中文描述： | 为5V，3.3V，ISRTM高性能的CPLD |
| 文件页数： | 6/64页 |
| 文件大小： | 1798K |
| 代理商： | CY3764VP208-200UXC |
第1页第2页第3页第4页第5页当前第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页
Ultra37000 CPLD Family
Document #: 38-03007 Rev. *D
Page 14 of 64
5.0V Device Characteristics
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with
Power Applied............................................. –55°C to +125°C
Supply Voltage to Ground Potential ............... –0.5V to +7.0V
DC Voltage Applied to Outputs
in High-Z State................................................–0.5V to +7.0V
DC Input Voltage ............................................–0.5V to +7.0V
DC Program Voltage............................................. 4.5 to 5.5V
Current into Outputs .................................................... 16 mA
Static Discharge Voltage........................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current..................................................... > 200 mA
Operating Range[2]
Range
Ambient Temperature[2]
Junction Temperature
Output Condition
VCC
VCCO
Commercial
0°C to +70°C
0°C to +90°C
5V
± 0.25V
5V
± 0.25V
3.3V
5V
± 0.25V
3.3V
± 0.3V
Industrial
–40°C to +85°C
–40°C to +105°C
5V
± 0.5V
5V
± 0.5V
3.3V
5V
± 0.5V
3.3V
± 0.3V
Military[3]
–55°C to +125°C
–55°C to +130°C
5V
± 0.5V
5V
± 0.5V
3.3V
5V
± 0.5V
3.3V
± 0.3V
5.0V Device Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
Min. Typ.
Max.
Unit
VOH
Output HIGH Voltage
VCC = Min.
IOH = –3.2 mA (Com’l/Ind)
[4]
2.4
V
IOH = –2.0 mA (Mil)
2.4
V
VOHZ
Output HIGH Voltage with
Output Disabled[5]
VCC = Max.
IOH = 0 A (Com’l)
4.2
V
IOH = 0 A (Ind/Mil)
4.5
V
IOH = –100 A (Com’l)
3.6
V
IOH = –150 A (Ind/Mil)
3.6
V
VOL
Output LOW Voltage
VCC = Min.
IOL = 16 mA (Com’l/Ind)
0.5
V
IOL = 12 mA (Mil)
0.5
V
VIH
Input HIGH Voltage
Guaranteed Input Logical HIGH Voltage for all Inputs[7]
2.0
VCCmax
V
VIL
Input LOW Voltage
Guaranteed Input Logical LOW Voltage for all Inputs[7]
–0.5
0.8
V
IIX
Input Load Current
VI = GND OR VCC, Bus-Hold Disabled
–10
10
A
IOZ
Output Leakage Current
VO = GND or VCC, Output Disabled, Bus-Hold Disabled
–50
50
A
IOS
–30
–160
mA
IBHL
Input Bus-Hold LOW
Sustaining Current
VCC = Min., VIL = 0.8V
+75
A
IBHH
Input Bus-Hold HIGH
Sustaining Current
VCC = Min., VIH = 2.0V
–75
A
IBHLO
Input Bus-Hold LOW
Overdrive Current
VCC = Max.
+500
A
IBHHO
Input Bus-Hold HIGH
Overdrive Current
VCC = Max.
–500
A
Notes:
2. Normal Programming Conditions apply across Ambient Temperature Range for specified programming methods. For more information on programming the
Ultra37000 Family devices, please refer to the Application Note titled “An Introduction to In System Reprogramming with the Ultra37000.”
3. TA is the “Instant On” case temperature.
4. IOH = –2 mA, IOL = 2 mA for TDO.
5. Tested initially and after any design or process changes that may affect these parameters.
6. When the I/O is output disabled, the bus-hold circuit can weakly pull the I/O to above 3.6V if no leakage current is allowed. Note that all I/Os are output disabled
during ISR programming. Refer to the application note “Understanding Bus-Hold” for additional information.
7. These are absolute values with respect to device ground. All overshoots due to system or tester noise are included.
8. Not more than one output should be tested at a time. Duration of the short circuit should not exceed 1 second. VOUT = 0.5V has been chosen to avoid test
problems caused by tester ground degradation.
相关PDF资料 |
PDF描述 |
|---|---|
| CY3930V484-125BBC | CPLDs at FPGA Densities |
| CY3950V484-125BBC | CPLDs at FPGA Densities |
| CY54FCT540CTDMB | FCT SERIES, 8-BIT DRIVER, INVERTED OUTPUT, CDIP20 |
| CY54FCT543CTDMB | FCT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CDIP24 |
| CY54FCT543ATDMB | FCT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CDIP24 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CY38050V208-125NTC | 制造商:Cypress Semiconductor 功能描述:CPLD QUANTUM38K 72K GATES 768 MCRCLLS COMM 0.18UM 2.5V/3.3V - Bulk |
| CY38050V208-125NTI | 制造商:Cypress Semiconductor 功能描述:CPLD QUANTUM38K 72K GATES 768 MCRCLLS IND 0.18UM 2.5V/3.3V 2 - Bulk |
| CY38050V208-83NTC | 制造商:Cypress Semiconductor 功能描述:CPLD QUANTUM38K 72K GATES 768 MCRCLLS COMM 0.18UM 2.5V/3.3V - Bulk |
| CY38050V208-83NTI | 制造商:Cypress Semiconductor 功能描述:CPLD QUANTUM38K 72K GATES 768 MCRCLLS IND 0.18UM 2.5V/3.3V 2 - Bulk |
| CY38100V208-125NTI | 制造商:Cypress Semiconductor 功能描述:CPLD QUANTUM38K 144K GATES 1536 MCRCLLS IND 0.18UM 2.5V/3.3V - Bulk |
发布紧急采购，3分钟左右您将得到回复。