- 您现在的位置：买卖IC网 > PDF目录295376 > CY7C09569V-100AC SYNC SRAM|16KX36|CMOS|QFP|144PIN|PLASTIC PDF资料下载
参数资料
| 型号： | CY7C09569V-100AC |
| 英文描述： | SYNC SRAM|16KX36|CMOS|QFP|144PIN|PLASTIC |
| 中文描述： | 同步静态存储器| 16KX36 |的CMOS | QFP封装| 144Pin支持|塑料 |
| 文件页数： | 2/20页 |
| 文件大小： | 301K |
| 代理商： | CY7C09569V-100AC |
CY7C138AV/144AV/006AV
CY7C139AV/145AV/016AV
CY7C007AV/017AV
Document #: 38-06051 Rev. *A
Page 10 of 20
Notes:
29. R/W must be HIGH during all address transitions.
30. A write occurs during the overlap (tSCE or tPWE) of a LOW CE or SEM.
31. tHA is measured from the earlier of CE or R/W or (SEM or R/W) going HIGH at the end of write cycle.
32. If OE is LOW during a R/W controlled write cycle, the write pulse width must be the larger of tPWE or (tHZWE + tSD) to allow the I/O drivers to turn off and
data to be placed on the bus for the required tSD. If OE is HIGH during an R/W controlled write cycle, this requirement does not apply and the write pulse
can be as short as the specified tPWE.
33. Transition is measured
±500 mV from steady state with a 5-pF load (including scope and jig). This parameter is sampled and not 100% tested.
34. To access RAM, CE = VIL, SEM = VIH.
35. During this period, the I/O pins are in the output state, and input signals must not be applied.
36. If the CE or SEM LOW transition occurs simultaneously with or after the R/W LOW transition, the outputs remain in the high-impedance state.
Switching Waveforms (continued)
tAW
tWC
tPWE
tHD
tSD
tHA
CE
R/W
OE
DATA OUT
DATA IN
ADDRESS
tHZOE
tSA
tHZWE
tLZWE
Write Cycle No. 1: R/W Controlled Timing[29, 30, 31, 32]
[33]
[32]
[34]
[35]
tAW
tWC
tSCE
tHD
tSD
tHA
CE
R/W
DATA IN
ADDRESS
tSA
Write Cycle No. 2: CE Controlled Timing[29, 30, 31, 36]
[34]
相关PDF资料 |
PDF描述 |
|---|---|
| CY7C1413BV18-250BZXI | 2M X 18 QDR SRAM, 0.45 ns, PBGA165 |
| CY7C145-35JCR | 8K X 9 DUAL-PORT SRAM, 35 ns, PQCC68 |
| CY7C1472BV25-250BZXI | 4M X 18 ZBT SRAM, 3 ns, PBGA165 |
| CY7C164-15PC | 16K x 4 Static RAM |
| CY7C164-25PC | 16K x 4 Static RAM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CY7C09569V-100AXC | 功能描述:静态随机存取存储器 512K (16Kx36) 3.3v 100MHz Synch 静态随机存取存储器 RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
| CY7C09569V-100BBC | 功能描述:静态随机存取存储器 512K (16Kx36) 3.3v 100MHz Synch 静态随机存取存储器 RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
| CY7C09569V-67AC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Dual 3.3V 576K-Bit 16K x 36 20ns/8ns 144-Pin TQFP |
| CY7C09569V83AC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C09569V-83AC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Dual 3.3V 576K-Bit 16K x 36 18ns/6ns 144-Pin TQFP |
发布紧急采购，3分钟左右您将得到回复。