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参数资料
| 型号： | D12 ISA PC EVAL KIT |
| 厂商： | NXP Semiconductors |
| 文件页数： | 8/14页 |
| 文件大小： | 0K |
| 描述： | EVAL KIT FOR PDIUSBD12 USB EPP |
| 标准包装： | 1 |
| 主要目的： | 接口，USB 2.0 主机/控制器 |
| 已用 IC / 零件： | PDIUSBD12 |
| 已供物品： | 板 |
| 相关产品： | 568-1092-6-ND - IC USB INTRFC W/PARL BUS 28TSSOP PDIUSBD12DTM-ND - IC USB INTRFC W/PARL BUS 28-SOIC PDIUSBD12PWAA-ND - IC USB INTRFC W/PARL BUS 28TSSOP 568-1092-1-ND - IC USB INTRFC W/PARL BUS 28TSSOP 568-1092-2-ND - IC USB INTRFC W/PARL BUS 28TSSOP 568-1091-5-ND - IC USB INTRFC W/PARL BUS 28-SOIC |
| 其它名称： | Q2544495 |
Interconnectivity
PDIUSBD12 Evaluation Board (PC Kit) User’s Manual
Page 8 of 14
REV. 2.1
See the table below for the description of endpoints operations on PDIUSBD12 evaluation board.
Endpoint
Number
1
1
2
Endpoint
Type
Generic
In
Generic
Out
Main In
Main Out
Operations
This pipe is defined as Interrupt In pipe. The PDIUSBD12 evaluation
board sends key press/release data packet to the host when test keys
are pressed or released. The firmware uses I/O accesses on this
endpoint.
This pipe is defined as Interrupt Out pipe. Data packet received from
host is interpreted as LED control and the D12 evaluation board
firmware will light up the corresponding LED. The firmware uses I/O
accesses on this endpoint.
These pipes are defined as Bulk In/Out endpoints. Test applet and the
PDIUSBD12 evaluation board supports 3 test modes: loop-back mode,
print mode and scan mode. The firmware uses DMA for data transfer
on these endpoints.
Main endpoints support 3 different test modes:
1. Scan mode: The PDIUSBD12 evaluation board acts like a scanner. It sends data packets to the
host PC as fast as possible. This mode is used to evaluate the maximal Bulk In transfer rate.
2. Print mode: The PDIUSBD12 evaluation board acts like a printer. It receives data packets from
the host PC as fast as possible. This mode is used to evaluate the maximal Bulk Out transfer rate.
3. Loop back mode: In this mode, the PDIUSBD12 evaluation board receives data packets on Main
Out endpoint and sends them back to the host PC on Main In endpoint. This mode is used to test
the data integrity of transfers.
The “Buffer Size” setting on the test applet is determined by the firmware and hardware ability of the
evaluation board. For PC kit, the maximal size is limited to 64000; On USB-EPP kit, this is limited to
16384.
The “Repeat Times” for loop-back test controls the numbers of iterations of loop-back, which is useful
for debugging. “-1” means it is infinite.
_______________________________________________________________________________________________
Philips Semiconductors - Asia Product Innovation Centre
Visit http://www.flexiusb.com
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