参数资料
型号: D12 ISA PC EVAL KIT
厂商: NXP Semiconductors
文件页数: 9/14页
文件大小: 0K
描述: EVAL KIT FOR PDIUSBD12 USB EPP
标准包装: 1
主要目的: 接口,USB 2.0 主机/控制器
已用 IC / 零件: PDIUSBD12
已供物品:
相关产品: 568-1092-6-ND - IC USB INTRFC W/PARL BUS 28TSSOP
PDIUSBD12DTM-ND - IC USB INTRFC W/PARL BUS 28-SOIC
PDIUSBD12PWAA-ND - IC USB INTRFC W/PARL BUS 28TSSOP
568-1092-1-ND - IC USB INTRFC W/PARL BUS 28TSSOP
568-1092-2-ND - IC USB INTRFC W/PARL BUS 28TSSOP
568-1091-5-ND - IC USB INTRFC W/PARL BUS 28-SOIC
其它名称: Q2544495
Interconnectivity
PDIUSBD12 Evaluation Board (PC Kit) User’s Manual
HARDWARE DESCRIPTION
Page 9 of 14
REV. 2.1
On USB host side, a
sample application program
D12TEST.EXE and a
general purpose minidriver
D12TEST.SYS are
System Block
Diagram of D12
Evaluation Kit
Customer's System
provided.
25
CPU,
USB Host PC
25 Pin Interface
1. VCC, GND
2. D0 - D7
On device side, sample firmware
D12FW.EXE is provided for
running on device PC. The
Pin
I/F
Memory,
and DMA
Controller
D12 Sample Applet
3. ADDRESS ENABLE
4. IOW, IOR, IRQ, RESET
5. DREQ, DACK, EOT
firmware is written in C for easily
portable to other CPU platforms.
D12TEST.EXE
D12 Evaluation Board
USB Device PC
D12 Sample Driver
D12TEST.SYS
Test
Key
General
Input port
Command
and Address
Decoder
25
Pin
I/F
D12 ISA Bridging Board
USBD
Test
General
25
ISA
USB Host Controller
LED
Output port
Pin
Slot
Driver
Bi-direction
I/F
USB Host Controller
PDIUSBD12
Bus
Transceiver
DIP
Switches
and
Jumpers
Block Diagram
Above block diagram shows 5 main components on the PDIUSBD12 evaluation board. Beside bus
transceiver, address/command decoder and PDIUSBD12, a general input port and a general output
port are included in the design. These input and output ports are designed for test purposes, such as
test switches and test LEDs. They also act as glue logic to adapt the PDIUSBD12 to the ISA bus. For
example, ISA interrupt is edge triggered, but PDIUSBD12 interrupt is level triggered. The MSB of the
general output port is used as interrupt enable to convert level triggered interrupt to edge triggered.
I/O Mapping
PDIUSBD12 evaluation board uses 8 I/O addresses:
Offset
0
1
2
3
4 to 7
Usage
D12 data register, R/W
D12 command register, W only
General input port, R only
General output port, W only
Reserved for expansion board
_______________________________________________________________________________________________
Philips Semiconductors - Asia Product Innovation Centre
Visit http://www.flexiusb.com
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