- 您现在的位置：买卖IC网 > PDF目录17105 > DC1096A (Linear Technology)BOARD DAC LTC2642-16 PDF资料下载
参数资料
| 型号： | DC1096A |
| 厂商： | Linear Technology |
| 文件页数： | 4/24页 |
| 文件大小： | 0K |
| 描述： | BOARD DAC LTC2642-16 |
| 软件下载： | QuikEval System |
| 设计资源： | DC1096A Design File DC1096A Schematic |
| 标准包装： | 1 |
| 系列： | QuikEval™ |
| DAC 的数量： | 1 |
| 位数： | 16 |
| 数据接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 设置时间： | 1µs |
| DAC 型： | 电压 |
| 工作温度： | 0°C ~ 70°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | LTC2642-16 |
LTC2641/LTC2642
12
26412fc
For more information www.linear.com/LTC2641
operaTion
high-to-low transition, the data on DIN is loaded, MSB
first, into the shift register on each rising edge of the serial
clock input (SCLK). After 16 data bits have been loaded
into the serial input register, a low-to-high transition on
CS transfers the data to the 16-bit DAC latch, updating
the DAC output (see Figures 1a, 1b, 1c). While CS remains
high, the serial input shift register is disabled. If there
are less than 16 low-to-high transitions on SCLK while
CS remains low, the data will be corrupted, and must be
reloaded.Also,iftherearemorethan16low-to-hightransi-
tions on SCLK while CS remains low, only the last 16 data
bits loaded from DIN will be transferred to the DAC latch.
For the 14-bit DACs, (LTC2641-14/LTC2642-14), the MSB
remains in the same (left-justified) position in the input
16-bit data word. Therefore, two “don’t-care” bits must
be loaded after the LSB, to make up the required 16 data
bits (Figure 1b). Similarly, for the 12-bit family members
(LTC2641-12/LTC2642-12) four “don’t-care” bits must
follow the LSB (Figure 1c).
Power-On Reset
The LTC2641/LTC2642 include a power-on reset circuit
to ensure that the DAC ouput comes up in a known state.
When VDD is first applied, the power-on reset circuit
sets the output of the LTC2641 to zero-scale (code 0).
The LTC2642 powers up to midscale (bipolar zero). De-
pending on the DAC number of bits, the midscale code
is: 32,768 (LTC2642-16); 8,192 (LTC2642-14); or 2,048
(LTC2642-12).
Clearing the DAC
A 10ns (minimum) low pulse on the CLR pin asynchro-
nously clears the DAC latch to code zero (LTC2641) or to
midscale (LTC2642).
Figure 1c. 12-Bit Timing Diagram (LTC2641-12/LTC2642-12)
Figure 1b. 14-Bit Timing Diagram (LTC2641-14/LTC2642-14)
Figure 1a. 16-Bit Timing Diagram (LTC2641-16/LTC2642-16)
D15
MSB
1
CS
SCLK
DIN
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
D14 D13 D12 D11 D10 D9
D8
DATA (16 BITS)
D7
D6
D5
D4
D3
D2
D1
D0
DAC
UPDATED
LSB
26412 F01a
D13
MSB
1
CS
SCLK
DIN
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
D12 D11 D10 D9
D8
D7
D6
DATA (14 BITS + 2 DON’T-CARE BITS)
D5
D4
D3
D2
D1
D0
X
DAC
UPDATED
LSB
26412 F01b
MSB
1
CS
SCLK
DIN
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
D11 D10 D9
D8
D7
D6
DATA (12 BITS + 4 DON’T-CARE BITS)
D5
D4
D3
D2
D1
D0
X
DAC
UPDATED
LSB
26412 F01c
相关PDF资料 |
PDF描述 |
|---|---|
| RBM15DSEF-S243 | CONN EDGECARD 30POS .156 EYELET |
| REC3-2415DRWZ/H6/A | CONV DC/DC 3W 9-36VIN +/-15VOUT |
| VI-JTL-EZ | CONVERTER MOD DC/DC 28V 25W |
| GMM10DSES-S243 | CONN EDGECARD 20POS .156 EYELET |
| RYM10DTBS-S189 | CONN EDGECARD 20POS R/A .156 SLD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DC1096B | 制造商:Linear Technology 功能描述:BOARD EVAL FOR LTC2641/2 制造商:Linear Technology 功能描述:DEMO BOARD, LTC2642A-16 16BIT DAC; Silicon Manufacturer:Linear Technology; Silicon Core Number:LTC2642A-16; Kit Application Type:Data Converter; Application Sub Type:DAC; Kit Contents:Demo Board LTC2642A-16 |
| DC1096D03XO_D4X WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| DC1096D03XY_D4X WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| DC1096D04XR_D4X WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| DC1099A | 功能描述:BOARD EVAL LTC2953 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:- 标准包装:1 系列:- 主要目的:电信，线路接口单元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要属性:T1/J1/E1 LIU 次要属性:- 已供物品:板，电源，线缆，CD 其它名称:82EBV2081 |
发布紧急采购，3分钟左右您将得到回复。