参数资料
型号: DC1453A
厂商: Linear Technology
文件页数: 13/24页
文件大小: 0K
描述: BOARD EVAL LTM4619
软件下载: LTM4619 Spice Model
设计资源: DC1453A Design Files
DC1453A Schematic
标准包装: 1
系列: LTM®, uModule®
主要目的: DC/DC,步降
输出及类型: 2,非隔离
输出电压: 1.8V,3.3V
电流 - 输出: 4A
输入电压: 4.5 ~ 28 V
稳压器拓扑结构: 降压
频率 - 开关: 500kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: LTM4619
相关产品: LTM4619IV#PBF-ND - IC SWIT REG BUCK 4A ADJ 144LGA
LTM4619EV#PBF-ND - IC SWIT REG BUCK 4A ADJ 144LGA
LTM4619
APPLICATIONS INFORMATION
Multiphase Operation
Multiphase operation with multiple LTM4619 devices in
parallel will lower the effective input RMS ripple current
as well as the output ripple current due to the interleaving
operation of the regulators. Figure 5 provides a ratio of
input RMS ripple current to DC load current as a function
of duty cycle and the number of paralleled phases. Choose
the corresponding duty cycle and the number of phases
to get the correct ripple current value. For example, the
2-phase parallel for one LTM4619 design provides 8A
at 2.5V output from a 12V input. The duty cycle is DC =
2.5V/12V = 0.21. The 2-phase curve has a ratio of ~0.25
for a duty cycle of 0.21. This 0.25 ratio of RMS ripple cur-
rent to a DC load current of 8A equals ~2A of input RMS
ripple current for the external input capacitors.
The effective output ripple current is lowered with mul-
tiphase operations as well. Figure 6 provides a ratio of
peak-to-peak output ripple current to the normalized
output ripple current as a function of duty cycle and the
number of paralleled phases. Choose the corresponding
duty cycle and the number of phases to get the correct
output ripple current ratio value. If a 2-phase operation
is chosen at 12V IN to 2.5V OUT with a duty cycle of 21%,
then 0.6 is the ratio of the normalized output ripple cur-
rent to inductor ripple DIr at zero duty cycle. This leads
to ~1.3A of the effective output ripple current Δ I L if the
DIr is at 2.2A. Refer to Application Note 77 for a detailed
explanation of the output ripple current reduction as a
function of paralleled phases.
RUN Pin
The RUN pins can be used to enable or sequence the
particular regulator channel. The RUN pins have their own
internal 0.5μA current source to pull up the pin to 1.2V, and
then the current increases to 4.5μA above 1.2V. Careful
consideration is needed to assure that board contamination
or residue does not load down the 0.5μA pull-up current.
Otherwise active control to these pins can be used to en-
able the regulators. A voltage divider can be used from
V IN to set an enable point that can also be used as a UVLO
feature for the regulator. The resistor divider needs to be
low enough resistance to swamp out the pull-up current
sources to prevent unintended activation of the device.
See the Simplified Block Diagram.
Power Good
The PGOOD pin is connected to the open drain of an internal
N-channel MOSFET. The MOSFET turns on and pulls the
PGOOD pin low when either V FB pin voltage is not within
±7.5% of the 0.8V reference voltage. The PGOOD pin is
also pulled low when either RUN pin is below 1.2V or when
the LTM4619 is in the soft-start or tracking phase. When
the V FB pin voltage is within the ±7.5% requirement, the
MOSFET is turned off and the pin is allowed to be pulled
up by an external resistor to a source of up to 6V. The
PGOOD pin will flag power good immediately when both
V FB pins are within the ±7.5% window. However, there is
an internal 17μs power bad mask when either V FB goes
out of the ±7.5% window.
The output ripple voltage has two components that are
related to the amount of bulk capacitance and effective
series resistance (ESR) of the output bulk capacitance.
Therefore, the output ripple voltage can be calculated with
the known effective output ripple current. The equation:
Δ V OUT(P-P) ≈ Δ I L /(8 ? f ? N ? C OUT ) + ESR ? Δ I L
where f is frequency and N is the number of parallel phases.
4619fb
For more information www.linear.com/LTM4619
13
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