参数资料
型号: DC1743A
厂商: Linear Technology
文件页数: 10/28页
文件大小: 0K
描述: BOARD DEMO LTM4613
产品培训模块: µModule® Family of EN55022 Class B Certified Regulators
设计资源: DC1743A Design Files
标准包装: 1
系列: µModule®
主要目的: DC/DC,步降
输出及类型: 1,非隔离
输出电压: 3.3V,5V,12V
电流 - 输出: 8A
输入电压: 5 ~ 36 V
稳压器拓扑结构: 降压
频率 - 开关: 165kHz,250kHz,600kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: LTM4613
LTM4613
OPERATION
100k + R FB
V OUT = 0.6V ?
R F B =
V OUT
PowerModuleDescription
The LTM4613 is a standalone nonisolated switch mode
DC/DC power supply. It can deliver 8A of DC output cur-
rent with minimal external input and output capacitors.
This module provides a precisely regulated output voltage
programmable via one external resistor from 3.3V DC to
15V DC over a wide 5V to 36V input voltage. The typical
application schematic is shown in Figure 18.
The LTM4613 has an integrated constant on-time current
mode regulator, ultralow R DS(ON) FETs with fast switching
speed and integrated Schottky diodes. The typical switching
frequency is 600kHz at full load at 12V output. With current
mode control and internal feedback loop compensation,
the LTM4613 module has sufficient stability margins and
good transient performance under a wide range of operat-
ing conditions and with a wide range of output capacitors,
even all ceramic output capacitors.
Current mode control provides cycle-by-cycle fast current
limiting. Moreover, foldback current limiting is provided in
an overcurrent condition when V FB drops. Internal over-
voltage and undervoltage comparators pull the open-drain
PGOOD output low if the output feedback voltage exits a
±10% window around the regulation point. Furthermore,
in an overvoltage condition, internal top FET M1 is turned
APPLICATIONS INFORMATION
The typical LTM4613 application circuit is shown in Fig-
ure?18. External component selection is primarily deter-
mined by the input voltage, the maximum load current and
the output voltage. Refer to Table 2 for specific external
capacitor requirements for a particular application.
V IN to V OUT Stepdown Ratios
There are restrictions in the maximum V IN and V OUT step
down ratio that can be achieved for a given input voltage.
These constraints are shown in the Typical Performance
Characteristic curve labeled “V IN to V OUT Step-Down
Ratio.” Note that additional thermal derating may be ap-
plied. See the Thermal Considerations and Output Current
Derating section in this data sheet.
off and bottom FET M2 is turned on and held on until the
overvoltage condition clears.
Input filter and noise cancellation circuitry reduce the
noise coupling to inputs and outputs, and ensure the
electromagnetic interference (EMI) meets the limits of
EN55022 Class B (see Figure 7).
Pulling the RUN pin below 1V forces the controller into
its shutdown state, turning off both M1 and M2. At light
load currents, discontinuous mode (DCM) operation can
be enabled to achieve higher efficiency compared to con-
tinuous mode (CCM) by setting FCB pin higher than 0.6V.
When the DRV CC pin is connected to INTV CC , an integrated
5V linear regulator powers the internal gate drivers. If a
5V external bias supply is applied on DRV CC pin, then an
efficiency improvement will occur due to the reduced power
loss in the internal linear regulator. This is especially true
at the higher input voltage range.
The MPGM, MARG0, and MARG1 pins are used to sup-
port voltage margining, where the percentage of margin
is programmed by the MPGM pin, while the MARG0 and
MARG1 select positive or negative margining. The PLLIN
pin provides frequency synchronization of the device to
an external clock. The TRACK/SS pin is used for power
supply tracking and soft-start programming.
Output Voltage Programming and Margining
The PWM controller has an internal 0.6V reference volt-
age. As shown in the Block Diagram, a 100k 0.5% internal
feedback resistor connects the V OUT and V FB pins together.
Adding a resistor, R FB , from the V FB pin to the SGND pin
programs the output voltage.
R FB
or equivalently,
100k
? 1
0.6V
4613f
10
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