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参数资料
| 型号： | DC682A |
| 厂商： | Linear Technology |
| 文件页数： | 7/20页 |
| 文件大小： | 0K |
| 描述： | BOARD SAR ADC LTC1859 |
| 软件下载： | QuikEval System |
| 设计资源： | DC682A Design File DC682A Schematic |
| 标准包装： | 1 |
| 系列： | QuikEval™, SoftSpan™ |
| ADC 的数量： | 1 |
| 位数： | 16 |
| 采样率（每秒）： | 100k |
| 数据接口： | MICROWIRE?，串行，SPI? |
| 工作温度： | 0°C ~ 70°C |
| 已用 IC / 零件： | LTC1859 |
| 已供物品： | 板 |
| 相关产品： | LTC1859CG#PBF-ND - IC ADC 8CH 16BIT 100KSPS 28-SSOP LTC1859IG#PBF-ND - IC A/D CONV 8CH 16BIT 28-SSOP LTC1859IG#TRPBF-ND - IC A/D CONV 8CH 16BIT 28-SSOP LTC1859CG#TRPBF-ND - IC A/D CONV 8CH 16BIT 28-SSOP |
LTC1857/LTC1858/LTC1859
15
185789fa
0
1
2
3
4
5
6
7
CHANNEL
COM (
–)
8 Single-Ended
+
0,1
CHANNEL
4 Differential
2,3
4,5
6,7
+ (–)
+
+ (–)
– (+)
4
5
6
7
CHANNEL
COM (
–)
Combinations of
Differential and Single-Ended
+
0,1
2,3
–
COM (UNUSED)
Changing the
MUX Assignment “On the Fly”
COM (
–)
4,5
6,7
4,5
1ST CONVERSION
2ND CONVERSION
+
–
+
–
+
–
+
7
6
{
1859 F08
APPLICATIONS INFORMATION
three-state at this time. When the conversion is complete
(BUSY goes high), CONVST and RD go low to enable the
data output for the previous conversion.
SERIAL DATA INPUT (SDI) INTERFACE
The LTC1857/LTC1858/LTC1859 communicate with micro-
processors and other external circuitry via a synchronous,
full duplex, 3-wire serial interface (see Figure 7). The shift
clock (SCK) synchronizes the data transfer with each bit
being transmitted on the falling SCK edge and captured
on the rising SCK edge in both transmitting and receiving
systems. The data is transmitted and received simultane-
ously (full duplex).
An 8-bit input word is shifted into the SDI input which
congures the LTC1857/LTC1858/LTC1859 for the next
conversion. Simultaneously, the result of the previous
conversion is output on the SDO line. At the end of the
data exchange the requested conversion begins by ap-
plying a rising edge on CONVST. After tCONV, the conver-
sion is complete and the results will be available on the
next data transfer cycle. As shown below, the result of a
conversion is delayed by one conversion from the input
word requesting it.
SGL/
DIFF
SELECT
1
SELECT
0
UNI
GAIN
NAP
MUX ADDRESS
INPUT RANGE
POWER DOWN
SELECTION
1859 AI02
ODD
SIGN
SLEEP
SDI
SDO
SDO WORD 0
SDI WORD 1
DATA
TRANSFER
SDO WORD 2
SDI WORD 3
SDO WORD 1
SDI WORD 2
DATA
TRANSFER
tCONV
A/D
CONVERSION
tCONV
A/D
CONVERSION
1859 AI01
Figure 8. Examples of Multiplexer Options on the LTC1857/LTC1858/LTC1859
INPUT DATA WORD
The LTC1857/LTC1858/LTC1859 8-bit data word is clocked
into the SDI input on the rst eight rising SCK edges. Fur-
ther inputs on the SDI pin are then ignored until the next
conversion. The eight bits of the input word are dened
as follows:
Table 1. Multiplexer Channel Selection
MUX ADDRESS
DIFFERENTIAL CHANNEL SELECTION
MUX ADDRESS
SINGLE-ENDED CHANNEL SELECTION
SGL/
DIFF
ODD
SIGN
SELECT
1 0
01234567
SGL/
DIFF
ODD
SIGN
SELECT
1 0
01234567
COM
0
0 0
+
–
1
0
0 0
+
–
0
0 1
+
–
1
0
0 1
+
–
0
1 0
+
–
1
0
1 0
+
–
0
1 1
+
–
1
0
1 1
+
–
0
1
0 0
–
+
1
0 0
+
–
0
1
0 1
–
+
1
0 1
+
–
0
1
1 0
–
+
1
1 0
+
–
0
1
1 1
–
+
1
1 1
+
–
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