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参数资料
| 型号： | DC823B-B |
| 厂商： | Linear Technology |
| 文件页数： | 17/24页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL LTM4600HV |
| 软件下载： | LTM4600HV Spice Model |
| 设计资源： | DC823B-B Design Files DC823B-B Schematic |
| 标准包装： | 1 |
| 系列： | µModule® |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 0.6V，1.2V，1.5V，1.8V，2.5V，3.3V，和 5V |
| 电流 - 输出： | 10A（最小值） |
| 输入电压： | 4.5 ~ 28 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 1.35MHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | LTM4600HV |
| 相关产品： | LTM4600HVIV#PBF-ND - IC DC/DC UMODULE 10A 104-LGA LTM4600HVEV#PBF-ND - IC DC/DC UMODULE 10A 104-LGA |
LTM4600HV
APPLICATIO S I FOR ATIO
(DC) DUTY CYCLE = ON
DC = = OUT
V IN
t
t s
t s V IN
t ON V
C IN
t OFF
t ON
FREQ =
DC
t ON
4602 F25
PERIOD t s
PGND
The LTM4600HV has a minimum (t ON ) on time of 100
nanoseconds and a minimum (t OFF ) off time of 400
nanoseconds. The 2.4V clamp on the ramp threshold as
LOAD
V OUT
TOP LAYER
4600hv F20
a function of V OUT will cause the switching frequency to
increase by the ratio of V OUT /2.4V for 3.3V and 5V outputs.
This is due to the fact the on time will not increase as V OUT
increases past 2.4V. Therefore, if the nominal switch-
Figure 20. Recommended PCB Layout
LTM4600HV Frequency Adjustment
The LTM4600HV is designed to typically operate at 850kHz
across most input and output conditions. The control ar-
chitecture is constant on time valley mode current control.
The f ADJ pin is typically left open or decoupled with an
optional 1000pF capacitor. The switching frequency has
been optimized to maintain constant output ripple over the
operating conditions. The equations for setting the operat-
ing frequency are set around a programmable constant on
time. This on time is developed by a programmable current
into an on board 10pF capacitor that establishes a ramp
that is compared to a voltage threshold equal to the output
voltage up to a 2.4V clamp. This I ON current is equal to:
I ON = (V IN – 0.7V)/110k, with the 110k onboard resistor
from V IN to f ADJ . The on time is equal to t ON = (V OUT /I ON )
? 10pF and t OFF = t s – t ON . The frequency is equal to: Freq.
= DC/t ON . The I ON current is proportional to V IN , and the
regulator duty cycle is inversely proportional to V IN , there-
fore the step-down regulator will remain relatively constant
frequency as the duty cycle adjustment takes place with
lowering V IN . The on time is proportional to V OUT up to a
2.4V clamp. This will hold frequency relatively constant
with different output voltages up to 2.4V. The regulator
switching period is comprised of the on time and off time
as depicted in the following waveform. The on time is
equal to t ON = (V OUT /I ON ) ? 10pF and t OFF = t s – t ON . The
frequency is equal to: Frequency = DC/t ON ).
ing frequency is 850kHz, then the switching frequency
will increase to ~1.2MHz for 3.3V, and ~1.7MHz for 5V
outputs due to Frequency = (DC/t ON ) When the switching
frequency increases to 1.2MHz, then the time period t S is
reduced to ~833 nanoseconds and at 1.7MHz the switching
period reduces to ~588 nanoseconds. When higher duty
cycle conversions like 5V to 3.3V and 12V to 5V need to
be accommodated, then the switching frequency can be
lowered to alleviate the violation of the 400ns minimum
off time. Since the total switching period is t S = t ON + t OFF ,
t OFF will be below the 400ns minimum off time. A resistor
from the f ADJ pin to ground can shunt current away from
the on time generator, thus allowing for a longer on time
and a lower switching frequency. 12V to 5V and 5V to
3.3V derivations are explained in the data sheet to lower
switching frequency and accommodate these step-down
conversions.
Equations for setting frequency for 12V to 5V:
I ON = (V IN – 0.7V)/110k; I ON = 103μA
frequency = (I ON /[2.4V ? 10pF]) ? DC = 1.79MHz;
DC = duty cycle, duty cycle is (V OUT /V IN )
t S = t ON + t OFF , t ON = on-time, t OFF = off-time of the
switching period; t S = 1/frequency
t OFF must be greater than 400ns, or t S – t ON > 400ns.
t ON = DC ? t S
1MHz frequency or 1μs period is chosen for 12V to 5V.
4600hvfc
17
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