- 您现在的位置：买卖IC网 > PDF目录17065 > DC941A (Linear Technology)BOARD DELTA SIGMA ADC LTC2482 PDF资料下载
参数资料
| 型号： | DC941A |
| 厂商： | Linear Technology |
| 文件页数： | 7/32页 |
| 文件大小： | 0K |
| 描述： | BOARD DELTA SIGMA ADC LTC2482 |
| 软件下载： | QuikEval System |
| 设计资源： | DC941A Design File DC941A Schematic |
| 标准包装： | 1 |
| 系列： | Easy Drive™, QuikEval™ |
| ADC 的数量： | 1 |
| 位数： | 16 |
| 采样率（每秒）： | 6.8 |
| 数据接口： | MICROWIRE?，串行，SPI? |
| 工作温度： | 0°C ~ 70°C |
| 已用 IC / 零件： | LTC2482 |
| 已供物品： | 板 |
| 相关产品： | LTC2482IDD#TRPBF-ND - IC ADC 16BIT 10-DFN LTC2482CDD#TRPBF-ND - IC ADC 16BIT 10-DFN LTC2482IDD#PBF-ND - IC ADC 16BIT 10-DFN LTC2482CDD#PBF-ND - IC ADC 16BIT 10-DFN |
第1页第2页第3页第4页第5页第6页当前第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页
LTC2482
15
2482fc
APPLICATIONS INFORMATION
SERIAL INTERFACE TIMING MODES
The LTC2482’s 3-wire interface is SPI and MICROWIRE
compatible. This interface offers several exible modes
of operation. These include internal/external serial clock,
2- or 3-wire I/O, single cycle or continuous conversion. The
following sections describe each of these serial interface
timing modes in detail. In all these cases, the converter
can use the internal oscillator (fO = low or fO = high) or
an external oscillator connected to the fO pin. Refer to
Table 4 for a summary.
External Serial Clock, Single Cycle Operation
(SPI/MICROWIRE Compatible)
This timing mode uses an external serial clock to shift
out the conversion result and a CS signal to monitor and
control the state of the conversion cycle, see Figure 4.
The serial clock mode is selected on the falling edge of CS.
To select the external serial clock mode, the serial clock
pin (SCK) must be low during each CS falling edge.
The serial data output pin (SDO) is Hi-Z as long as CS is
high. At any time during the conversion cycle, CS may be
pulled low in order to monitor the state of the converter.
While CS is pulled low, EOC is output to the SDO pin.
EOC = 1 while a conversion is in progress and EOC = 0
if the device is in the sleep state. Independent of CS, the
device automatically enters the low power sleep state once
the conversion is complete.
When the device is in the sleep state, its conversion re-
sult is held in an internal static shift register. The device
remains in the sleep state until the rst rising edge of SCK
is seen while CS is low. The output data is shifted out of
the SDO pin on each falling edge of SCK. This enables
external circuitry to latch the output on the rising edge of
SCK. EOC can be latched on the rst rising edge of SCK
and the last bit of the conversion result can be latched
on the 24th rising edge of SCK. On the 24th falling edge
of SCK, the device begins a new conversion. SDO goes
high (EOC = 1) indicating a conversion is in progress.
In applications where the processor generates 32 clock
cycles, or to remain compatible with higher resolution
converters, the LTC2482’s digital interface will ignore extra
clock edges seen during the next conversion period after
the 24th and outputs “1” for the extra clock cycles.
At the conclusion of the data cycle, CS may remain low
and EOC monitored as an end-of-conversion interrupt.
Alternatively, CS may be driven high setting SDO to Hi-Z.
As described above, CS may be pulled low at any time in
order to monitor the conversion status.
Typically, CS remains low during the data output state.
However, the data output state may be aborted by pulling
CS high anytime between the rst rising edge and the
24th falling edge of SCK (see Figure 5). On the rising
edge of CS, the device aborts the data output state and
immediately initiates a new conversion. This is useful for
systems not requiring all 24 bits of output data, aborting
an invalid conversion cycle or synchronizing the start of
a conversion.
Table 4. LTC2482 Interface Timing Modes
CONFIGURATION
SCK SOURCE
CONVERSION CYCLE
CONTROL
DATA OUTPUT
CONTROL
CONNECTION and
WAVEFORMS
External SCK, Single Cycle Conversion
External
CS and SCK
Figures 4, 5
External SCK, 2-Wire I/O
External
SCK
Figure 6
Internal SCK, Single Cycle Conversion
Internal
CS↓
Figures 7, 8
Internal SCK, 2-Wire I/O, Continuous Conversion
Internal
Continuous
Internal
Figure 9
相关PDF资料 |
PDF描述 |
|---|---|
| SDR0604-102KL | INDUCTOR POWER 1000UH 10% SMD |
| AD9750-EBZ | BOARD EVAL FOR AD9750 |
| LGU2W820MELA | CAP ALUM 82UF 450V 20% SNAP |
| AD9752-EBZ | BOARD EVAL FOR AD9752 |
| AD9754-EBZ | BOARD EVAL FOR AD9754 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DC945KB | 制造商:DEWALT 功能描述:DRILL KIT CORDLESS 12V |
| DC945KB-GB | 制造商:DEWALT 功能描述:DRILL 12V |
| DC-9-500-2.1P | 制造商:SR COMPONENTS 功能描述: 制造商:SR Components Inc 功能描述: |
| DC-9-500-3.5P | 制造商:SR COMPONENTS 功能描述: 制造商:SR Components Inc 功能描述: |
| DC950KX | 制造商:Dewalt 功能描述:18V Hammer Drill/Driver with 1/2" Chuck |
发布紧急采购，3分钟左右您将得到回复。