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参数资料
| 型号： | DK-PCI-2C35N |
| 厂商： | Altera |
| 文件页数： | 37/40页 |
| 文件大小： | 0K |
| 描述： | PCI KIT W/CYCLONE II EP2C35N |
| 标准包装： | 1 |
| 系列： | Cyclone® II |
| 类型： | FPGA：PCI 开发套件 |
| 适用于相关产品： | Cyclone ll 2C35N |
| 所含物品： | 开发板、Quartus?II 网络版、缆线、附件、参考设计和演示 |
| 相关产品： | 544-2115-ND - IC CYCLONE II FPGA 33K 484-UBGA 544-2114-ND - IC CYCLONE II FPGA 33K 484-UBGA 544-2113-ND - IC CYCLONE II FPGA 33K 484-UBGA 544-2112-ND - IC CYCLONE II FPGA 33K 484-UBGA 544-2111-ND - IC CYCLONE II FPGA 33K 672-FBGA 544-2110-ND - IC CYCLONE II FPGA 33K 672-FBGA 544-2109-ND - IC CYCLONE II FPGA 33K 484-FBGA 544-2108-ND - IC CYCLONE II FPGA 33K 484-FBGA 544-1694-ND - IC CYCLONE II FPGA 33K 672-FBGA 544-1693-ND - IC CYCLONE II FPGA 33K 672-FBGA 更多... |
| 其它名称： | 544-1733 |
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Getting Started
a.
Choose Add/Remove Files in Project (Project menu)
?
Replace all design files pointing to the
C:\MegaCore\ddr_ddr2_sdram-v3.2.0\lib directory with
identical design files from the directory where you install
the MegaCore function files.
b.
c.
d.
e.
Select User Libraries under Category .
Type < DDR2 SDRAM Controller Compiler path > \lib in the
Library name box.
Click Add to add the DDR2 SDRAM library.
Click OK .
7.
If you did not install PCI Compiler in the default directory
c:\MegaCore\pci_compiler-v4.0.0 , you must modify the library
directory in the Quartus II project.
a.
b.
c.
d.
e.
Choose Add/Remove Files in Project (Project menu)
Select User Libraries under Category .
Type < PCI Compiler path > \lib in the Library name box.
Click Add to add the PCI Compiler library.
Click OK .
8.
If you are prototyping your own design (i.e., other than the Altera-
provided reference design), you must add the following constraints
to your design:
a.
b.
c.
Locations, I/O standards, and timing for the PCI MegaCore
functions. Refer to the PCI Compiler User Guide for instructions
on how to annotate the PCI constraint file into your project.
Locations, I/O standards, and timing for the DDR2 SDRAM
Controller MegaCore function. Refer to the DDR & DDR2
SDRAM Controller Compiler User Guide for instructions on how
to annotate the DDR2 SDRAM Controller constraint file into
your project.
Locations, I/O standards, timing, and general constraints for
the remainder of your design, including, but not limited to dip
switch settings, push buttons, and clock oscillators.
Altera Corporation
Core Version a.b.c variable
2–27
May 2005
PCI Development Kit, Cyclone II Edition Getting Started User Guide
相关PDF资料 |
PDF描述 |
|---|---|
| DK-PCIE-2SGX90N | PCIE KIT W/S II GX EP2SGX90N |
| DK-SI-2SGX90N | SI KIT W/SII GX EP2SGX90N |
| DK-SI-4SGX230N | KIT DEV STRATIX IV 4SGX230N/C2 |
| DK-START-3C25N | KIT STARTER CYCLONE III EP3C25 |
| DK-START-4CGX15N | KIT STARTER CYCLONE IV GX |
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