
Rev. 1.1 (April 2012)
2
DLP Design, Inc.
APPLICATIONS:
Rapid Prototyping
Educational Tool
Industrial/Process Control
Data Acquisition/Processing
Embedded Processor
1.0 INTRODUCTION
The DLP-HS-FPGA3 module is a low-cost, compact prototyping tool that can be used for rapid proof
of concept or within educational environments. The module is based on the Xilinx Spartan 3A and
Future Technology Devices International’s FT2232H Dual-Channel High-Speed USB IC. The
DLP-HS-FPGA3 provides both the beginner as well as the experienced engineer with a rapid path to
developing FPGA-based designs. When combined with the free ISE WebPACK tools from Xilinx,
this module is more than sufficient for creating anything from basic logical functions to a highly
complex system controller.
As a bonus feature, one channel of the dual-channel USB interface is used to load user bit files
directly to the SPI Flash—no external programmer is required. This represents a savings of as much
as $200 in that no additional programming cable is required for configuring the FPGA. All that is
needed to load bit files to the DLP-HS-FPGA3 is a Windows software utility (free with purchase), a
Windows PC and a USB cable. The module can also be programmed from within the Xilinx ISE tool
environment using a Xilinx programming cable (purchased separately).
The DLP-HS-FPGA3 is fully compatible with the free ISE WebPACK tools from Xilinx. ISE
WebPACK offers the ideal development environment for FPGA designs with HDL synthesis and
simulation, implementation, device fitting and JTAG programming.
The DLP-HS-FPGA3 has on-board voltage regulators that generate all required power supply
voltages from a single, 5-volt source. Power for the module can be taken from either the host USB
port or from a user-supplied, external 5-volt power supply via an onboard standard barrel connector.
Connection to user electronics is made via a 50-pin, 0.9-inch wide, industry-standard 0.025-square
inch post DIP header on the bottom of the board and a 26-pin, 0.05-inch wide top-side 2x13 header.
The bottom-side 50-pin header provides access to 41 of the FPGA user input/output pins. The
top-side header provides access to 22 of the FPGA user input/output pins. The bottom-side header
mates with a user-supplied, standard, 50-pin, 0.9-inch spaced DIP socket. The top-side header
mates with a user-supplied, 0.05-inch spaced, 2x13 connector such as the FFSD-13-D-xx.xx-01
(xx.xx = cable length) ribbon cable assembly from Samtec.