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参数资料
| 型号： | DP83957 |
| 文件页数： | 7/24页 |
| 文件大小： | 240K |
| 代理商： | DP83957 |
60 Register Description (Continued)
65 INTERRUPT MASK REGISTER (0x03)
This register masks the interrupts that can be generated by the Interrupt Status Register Writinga1toabit disables the
corresponding interrupt During a hardware Reset all interrupts are enabled
Reset State
0x00
Bit
Bit Name
Access
Bit Description
D7
SAM
RW
0 Enable Source Address Match Interrupt
1 Mask Source Address Match Interrupt
D6
SFD
ERR
RW
0 Enable Management Bus Error Interrupt
1 Mask Management Bus Error Interrupt
D5
WR
COM
RW
0 Enable SRAM Write complete Interrupt
1 Mask SRAM Write complete Interrupt
D4
RD
COM
RW
0 Enable SRAM Read complete Interrupt
1 Mask SRAM Read complete Interrupt
D3
IPN
RW
0 Enable Invalid Port Number Interrupt
1 Mask Invalid Port Number Interrupt
D2
OVRF
RW
0 Enable Attribute Overflow Interrupt
1 Mask Attribute Overflow Interrupt
D2 – D0
RES
Reserved
66 INTERRUPT STATUS REGISTER (0x04)
This register indicates the source of an interrupt when the INT pin goes active Enabling the corresponding bit in the Interrupt
Mask Register allows bits in this register to produce an interrupt When an interrupt occurs one or more bits in this register are
set to a 1
A specific interrupt is cleared by writinga1tothe bit that corresponds to the interrupt A particular interrupt is retained by writing
a0toit
Reset State
0x00
Bit
Bit Name
Access
Bit Description
D7
SAM
RW
Indicates that the last packet’s Source Address did not match with the ports
aLastSourceAddress attribute
D6
SFD
ERR
RW
Indicates that no SFD was detected within the MCRS envelope The management status alone
must contain 56 bits
D5
WR
COM
RW
Indicates that the DP83957 has completed a SRAM Write operation
D4
RD
COM
RW
Indicates that the DP83957 has completed ‘‘N’’ byte reads from SRAM The result of the
transfer is contained in the Read Data Byte Registers
Note
‘‘N’’ corresponds to the value programmed into the RAC 30 bits in Configuration Register 1
D3
IPN
RW
The Management Status received on the management bus contains a valid DP83950 ID but an
invalid port number This will normally occur if the Port number is greater than 13
D2
OVRF
RW
This bit indicates that an attribute overflow occurred for an attribute specified in the Overflow
Status Register 2 The DP83950 ID and Port Number is specified in the Overflow Status
Register 1
D1 – D0
RES
Reserved
15
相关PDF资料 |
PDF描述 |
|---|---|
| DP83957VF | REPEATER MANAGEMENT|QFP|80PIN|PLASTIC |
| DP83959AVUL | LAN Hub Controller |
| DP83BC04BJ | Single 8-bit Bus Transceiver |
| DP83BC04BN | Single 8-bit Bus Transceiver |
| DP8400-2 | Error Detection & Correction (EDAC) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DP83957VF | 制造商:未知厂家 制造商全称:未知厂家 功能描述:REPEATER MANAGEMENT|QFP|80PIN|PLASTIC |
| DP83959 | 制造商:NSC 制造商全称:National Semiconductor 功能描述:8-Port Lite Ethernet Repeater Interface Controller |
| DP83959AVUL | 制造商:未知厂家 制造商全称:未知厂家 功能描述:LAN Hub Controller |
| DP83959VUL | 制造商:NSC 制造商全称:National Semiconductor 功能描述:8-Port Lite Ethernet Repeater Interface Controller |
| DP83BC04BJ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Single 8-bit Bus Transceiver |
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