参数资料
型号: DP83957
文件页数: 8/24页
文件大小: 240K
代理商: DP83957
60 Register Description (Continued)
67 READ DATA BYTE REGISTER 1 – 6 (0x10 – 0x15)
The Read Data Byte Registers are used to buffer the data requested by the CPU from the external SRAM The CPU can read
data from the SRAM in chunks of 1 to 6 bytes depending on what values are stored in bits RAC 20 of Configuration Register 1
Reset State
Undefined
Bit
Bit Name
Access
Bit Description
D7–D0
RD
DATA 70
Read
These registers hold ‘‘N’’ bytes of data that are read from external SRAM
The first byte read back will be placed in Read Data Register 1 (0x10) Therefore if a 32-bit
counter is read N will be 4 and the least significant byte will be placed in Read Data
Register 1
68 ACCESS REGISTER 1 (0x20)
Access Register 1 selects a Port Attribute (offset) for a selected DP83950 ID and port number The selected DP83950 and port
number is specified in Access Register 2 The ACC
1 50 bits provide the 6-bit attribute offset within a page
Reset State
0x00
Bit
Bit Name
Access
Bit Description
D7 – D6
RES
Reserved
D5 – D0
ACC
1 50
ReadWrite
These 6 bits specify the Port Attribute for a selected DP83950 and Port number refer to
the Port Attribute Memory Map
69 ACCESS REGISTER 2 (0x21)
Access Register 2 provides the page select for the Port Attribute Memory Map The memory map for each DP83950 is broken
up into 13 pages where each page represents a port on the DP83950
To access a Port Attribute Access Register 2 must be programmed to select which of the two DP83950’s associated with the
DP83957 and the specific port (1 – 13) needs to be examined Once Access Register 2 is programmed the CPU can now go and
examine or modify a Port Attribute mentioned in Section 524
Reset State
0x00
Bit
Bit Name
Access
Bit Description
D7 – D5
RES
Reserved
D4
RIC
SEL
ReadWrite
This bit selects one of the two DP83950’s associated with the DP83957
If RIC
SEL is
0 DP83950 ID 1 is selected
1 DP83950 ID 2 is selected
D3 – D0
PORT 30
ReadWrite
These bits specify one of the 13 ports on a DP83950 that needs to be processed The ports
are numbered from 1 to 13 where port 1 is the full AUI port on the DP83950 (refer to the
DP83950 data sheet for more information)
610 WRITE DATA BYTE REGISTER (0x22)
The Write Data Byte register holds the value that will be written to external SRAM Depending on the write operation the value
can be used to change certain or all bytes of an attribute or fill the entire SRAM with one value
This register acts as a holding register for the CPU while the DP83957 is busy processing attributes This allows the CPU to write
the value into the register and forget about it without waiting for the DP83957 to give control to the CPU
Bit
Bit Name
Access
Bit Description
D 70
WR
D 70
ReadWrite
This holds the data byte value that will be transferred to external SRAM on a write
command
16
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