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参数资料
| 型号： | DS100BR111SQE/NOPB |
| 厂商： | National Semiconductor |
| 文件页数： | 11/43页 |
| 文件大小： | 0K |
| 描述： | IC REPEATER 10.3GBPS 2CH 24LLP |
| 标准包装： | 250 |
| 系列： | * |
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: 1 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 4 0 7 0 0 2 F E D 4 0 0 2 F E D 4 0 0 2 F C 4
: 1 0 0 0 1 0 0 0 A D 4 0 0 2 F A D 4 0 0 0 0 5 F 5 6 8 0 0 5 F 5 A 8 0 0 5 F 5 A E 9
: 1 0 0 0 2 0 0 0 8 0 0 5 F 5 A 8 0 0 0 0 5 4 5 4 F 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A 8
: 1 0 0 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C 0
: 1 0 0 0 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B 0
: 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A 0
: 1 0 0 0 6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 9 0
: 1 0 0 0 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8 0
: 1 0 0 0 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7 0
: 1 0 0 0 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 0
: 1 0 0 0 A 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 0
: 1 0 0 0 B 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 0
: 1 0 0 0 C 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0
: 1 0 0 0 D 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0
: 1 0 0 0 E 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
: 1 0 0 0 F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
: 0 0 0 0 0 0 0 1 F F
CRC-8 based on 40 bytes of
data in this shaded area
Insert the CRC value here
CRC Polynomial = 0x07
MAX EEPROM Burst = 32
SNLS338E – JANUARY 2011 – REVISED FEBRUARY 2013
Figure 7. Typical EEPROM Data Set
The CRC-8 calculation is performed on the first 3 bytes of header information plus the 37 bytes of data for the
DS100BR111 or 40 bytes in total. The result of this calculation is placed immediately after the DS100BR111 data
in the EEPROM which ends with "5454". The CRC-8 in the DS100BR111 uses a polynomial = x8 + x2 + x + 1
In SMBus master mode the DS100BR111 reads its initial configuration from an external EEPROM upon power-
up. Some of the pins of the DS100BR111 perform the same functions in SMBus master and SMBus slave mode.
Once the DS100BR111 has finished reading its initial configuration from the external EEPROM in SMBus master
mode it reverts to SMBus slave mode and can be further configured by an external controller over the SMBus.
The connection to an external SMBus master is optional and can be omitted for applications were additional
security is desirable. There are two pins that provide unique functions in SMBus master mode.
DONE#
READEN#
When the DS100BR111 is powered up in SMBus master mode, it reads its configuration from the external
EEPROM when the READEN# pin goes low. When the DS100BR111 is finished reading its configuration from
the external EEPROM, it drives the DONE# pin low. In applications where there is more than one DS100BR111
on the same SMBus, bus contention can result if more than one DS100BR111 tries to take control of the SMBus
at the same time. The READEN# and DONE# pins prevent this bus contention. The system should be designed
so that the READEN# pin from one DS100BR111 in the system is driven low on power-up. This DS100BR111
will take command of the SMBus on power-up and will read its initial configuration from the external EEPROM.
When it is finished reading its configuration, it will drive the DONE# pin low. This pin should be connected to the
READEN# pin of another DS100BR111. When this DS100BR111 senses its READEN# pin driven low, it will take
command of the SMBus and read its initial configuration from the external EEPROM, after which it will set its
DONE# pin low. By connecting the DONE# pin of each DS100BR111 to the READEN# pin of the next
DS100BR111, each DS100BR111 can read its initial configuration from the EEPROM without causing bus
contention.
Copyright 2011–2013, Texas Instruments Incorporated
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Product Folder Links: DS100BR111
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