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参数资料
| 型号： | DS1230AB-85 |
| 厂商： | DALLAS SEMICONDUCTOR |
| 元件分类： | Static RAM |
| 英文描述： | 32K X 8 NON-VOLATILE SRAM MODULE, 85 ns, PDIP28 |
| 封装： | DIP-28 |
| 文件页数： | 11/12页 |
| 文件大小： | 213K |
| 代理商： | DS1230AB-85 |
DS1230Y/AB
8 of 12
POWER-DOWN/POWER-UP TIMING
(tA: See Note 10)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
CE, at VIH before Power-Down
tPD
0
s
11
VCC slew from VTP to 0V ( CE at VIH)
tF
300
s
VCC slew from 0V to VTP ( CE at VIH)
tR
300
s
CE
at VIH after Power-Up
tREC
2
125
ms
(tA=25
°C)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Expected Data Retention Time
tDR
10
years
9
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery
backup mode.
NOTES:
1.
WE
is high for a Read Cycle.
2. OE = VIH or VIL. If OE = VIH during write cycle, the output buffers remain in a high-impedance state.
3. tWP is specified as the logical AND of CE and WE . tWP is measured from the latter of CE or WE
going low to the earlier of CE or WE going high.
4. tDH, tDS are measured from the earlier of CE or WE going high.
5. These parameters are sampled with a 5 pF load and are not 100% tested.
6. If the CE low transition occurs simultaneously with or latter than the WE low transition, the output
buffers remain in a high-impedance state during this period.
7. If the CE high transition occurs prior to or simultaneously with the WE high transition, the output
buffers remain in high-impedance state during this period.
8. If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition,
the output buffers remain in a high-impedance state during this period.
9. Each DS1230Y has a built-in switch that disconnects the lithium source until VCC is first applied by
the user. The expected tDR is defined as accumulative time in the absence of VCC starting from the
time power is first applied by the user.
10. All AC and DC electrical characteristics are valid over the full operating temperature range. For
commercial products, this range is 0
°C to 70°C. For industrial products (IND), this range is -40°C to
+85
°C.
11. In a power-down condition the voltage on any pin may not exceed the voltage on VCC.
12. tWR1 and tDH1 are measured from WE going high.
13. tWR2 and tDH2 are measured from CE going high.
14. DS1230 DIP modules are recognized by Underwriters Laboratory (U.L.
) under file E99151.
DS1230 PowerCap modules are pending U.L. review. Contact the factory for status.
相关PDF资料 |
PDF描述 |
|---|---|
| DS1230AB-70 | 32K X 8 NON-VOLATILE SRAM MODULE, 70 ns, PDIP28 |
| DS1230YP-100 | 32K X 8 NON-VOLATILE SRAM MODULE, 100 ns, DMA34 |
| DS1230Y-150 | 32K X 8 NON-VOLATILE SRAM MODULE, 150 ns, PDIP28 |
| DS1230W-150 | 32K X 8 NON-VOLATILE SRAM MODULE, 150 ns, DIP28 |
| DS1230WP-150 | 32K X 8 NON-VOLATILE SRAM MODULE, 150 ns, DMA34 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1230AB-85+ | 功能描述:NVRAM 256k Nonvolatile SRAM RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube |
| DS1230AB-85IND | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:256k Nonvolatile SRAM |
| DS1230AB-85-IND | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:256k Nonvolatile SRAM |
| DS1230ABL-100 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NVRAM (Battery Based) |
| DS1230ABL-100-IND | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NVRAM (Battery Based) |
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