参数资料
型号: DS1501
厂商: Maxim Integrated Products, Inc.
英文描述: Y2KC Watchdog Real Time Clock(Y2KC看门狗实时时钟)
中文描述: Y2K兼容、看门狗实时时钟
文件页数: 2/22页
文件大小: 178K
代理商: DS1501
DS1501/DS1511
071098 2/22
shown in Figure 1. The RTC registers contain century,
year, month, date, day, hours, minutes, and seconds
data in 24–hour BCD format. Corrections for day of
month and leap year are made automatically.
SIGNAL DESCRIPTION
V
CC
A0–A4
DQ0–DQ8
CE
OE
WE
IRQ
PWR
RST
KS
SQW
V
BAT
V
BAUX
X1
X2
GND
NC
– Supply Voltage
– Address Inputs
– Data I/O
– Chip Enable Input
– Output Enable Input
– Write Enable Input
– Interrupt Output (open drain)
– Power–On Output (open drain)
– Reset Output (open drain)
– Kickstart Input
– Square wave output
– Backup Battery Supply
– Auxiliary battery supply
– Oscillator Input
– Oscillator Output
– Ground
– No Connection
The RTC registers are double buffered into an internal
and external set. The user has direct access to the
external set. Clock/calendar updates to the external set
of registers can be disabled and enabled to allow the
user to access static data. Assuming the internal oscil-
lator is turned on, the internal set of registers are contin-
uously updated; this occurs regardless of external reg-
isters settings to guarantee that accurate RTC
information is always maintained.
The DS1501/DS1511 contains its own power fail cir-
cuitry which automatically deselects the device when
the V
CC
supply enters an out of tolerance condition.
This feature provides a high degree of data security dur-
ing unpredictable system operation brought on by low
V
CC
levels.
The DS1501/DS1511 has interrupt (IRQ), wakeup
(PWR), and reset (RST) outputs which can be used to
control CPU activity. The IRQ interrupt output can be
used to generate an external interrupt under several
conditions. A Wakeup interrupt will be generated when
the RTC register values match user programmed alarm
values and Time of day/date Power Enable bit (TPE) (Bit
4), in register 0Fh is set to a logic 1. A Kickstart interrupt
will be generated when a high to low transition occurs on
the Kickstart (KS) pin while the Kickstart Interrupt
Enable bit (KIE) (Bit 2), in register 0Fh is set to a logic 1.
The interrupt is always available while the device is
powered from the system supply. The PWR output can
be programmed to occur when in the battery backed
state to serve as a system wake–up. The PWR pin is
under software control, so that when a task is complete,
the system power can then be shut down. Either the IRQ
or RST outputs can also be used as a CPU watchdog
timer, CPU activity is monitored and an interrupt or reset
output will be activated if the correct activity is not
detected
within
programmed
DS1501/DS1511 power–on reset can be used to detect
a system power down or failure and hold the CPU in a
safe reset state until normal power returns and stabi-
lizes; the RST output is used for this function.
limits.
The
The DS1501/DS1511 also incorporates a 32.768 kHz
output for sustaining power management activities.
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