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参数资料
| 型号： | DS17285S-3+T&R |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | XO, clock |
| 英文描述： | 3V/5V Real-Time Clock |
| 中文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO24 |
| 封装： | SO-24 |
| 文件页数： | 7/38页 |
| 文件大小： | 411K |
| 代理商： | DS17285S-3+T&R |
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DS17285/DS17287
15 of 38
UPDATE CYCLE
The serialized RTC executes an update cycle once per second regardless of the SET bit in Register B.
When the SET bit in Register B is set to 1, the user copy of the double-buffered time, calendar, alarm,
and elapsed time byte is frozen and does not update as the time increments. However, the time countdown
chain continues to update the internal copy of the buffer. This feature allows the time to maintain
accuracy independent of reading or writing the time, calendar, and alarm buffers and also guarantees that
time and calendar information is consistent. The update cycle also compares each alarm byte with the
corresponding time byte and issues an alarm if a match or if a “don’t care” code is present in all alarm
locations.
There are three methods that can handle access of the RTC that avoid any possibility of accessing
inconsistent time and calendar data. The first method uses the update-ended interrupt. If enabled, an
interrupt occurs after every update cycle that indicates that over 999ms is available to read valid time and
date information. If this interrupt is used, the IRQF bit in Register C should be cleared before leaving the
interrupt routine.
A second method uses the update-in-progress bit (UIP) in Register A to determine if the update cycle is in
progress. The UIP bit pulses once per second. After the UIP bit goes high, the update transfer occurs
244s later. If a low is read on the UIP bit, the user has at least 244s before the time/calendar data is
changed. Therefore, the user should avoid interrupt service routines that would cause the time needed to
read valid time/calendar data to exceed 244s.
The third method uses a periodic interrupt to determine if an update cycle is in progress. The UIP bit in
Register A is set high between the setting of the PF bit in Register C (Figure 3). Periodic interrupts that
occur at a rate of greater than tBUC allow valid time and date information to be reached at each occurrence
of the periodic interrupt. The reads should be complete within (tPI / 2 + tBUC) to ensure that data is not
read during the update cycle.
Figure 3. UPDATE-ENDED AND PERIODIC INTERRUPT RELATIONSHIP
相关PDF资料 |
PDF描述 |
|---|---|
| DS17285S-5+T&R | 3V/5V Real-Time Clock |
| DS1743P-85IND+ | Y2K-Compliant, Nonvolatile Timekeeping RAMs |
| DS1743P-C01+ | Y2K-Compliant, Nonvolatile Timekeeping RAMs |
| DS1744-70+ | Y2K-Compliant, Nonvolatile Timekeeping RAMs |
| DS1744-70IND+ | Y2K-Compliant, Nonvolatile Timekeeping RAMs |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS17285S-5 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| DS17285S-5/T&R | 制造商:Maxim Integrated Products 功能描述:IC RTC 5V 2K NV RAM 24-SOIC |
| DS17285S-5/T&R | 功能描述:实时时钟 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS17285S-5+ | 功能描述:实时时钟 3V/5V RTC K Multiplexed Kick-S RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS17285S-5+T&R | 制造商:Maxim Integrated Products 功能描述:REAL TIME CLOCK MULTIPLEXED 2KBYTE 24SOIC - Tape and Reel 制造商:Maxim Integrated Products 功能描述:Maxim Integrated DS17285S-5+T&R Real Time Clocks (RTC) 制造商:Maxim Integrated Products 功能描述:IC RTC 5V 2K NV RAM 24-SOIC |
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