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参数资料
| 型号： | DS1808Z-050/T&R |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 6/17页 |
| 文件大小： | 0K |
| 描述： | IC POT DUAL LOG HV 50K 16-SOIC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 接片： | 32 |
| 电阻（欧姆）： | 45k |
| 电路数： | 2 |
| 温度系数： | 标准值 750 ppm/°C |
| 存储器类型： | 易失 |
| 接口： | I²C（设备位址） |
| 电源电压： | 4.5 V ~ 5.5 V，±4.5 V ~ 13.2 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 带卷 (TR) |
DS1808
14 of 17
NOTES:
1. All voltages are referenced to ground.
2. I/O pins of fast mode devices must not obstruct the SDA and SCL lines if VCC is switched off.
3. The value of VDD should never exceed VCC, including during power-ups. VCC must be applied before
either VDD or VB. VDD and VB can then follow in any order.
4. ISTBY specified for VDD equal to 5.0V. Control port logic pins are driven to the appropriate logic
levels. Appropriate logic levels specify that logic inputs are within a 0.5V of ground or VDD for the
corresponding inactive state.
5. A fast mode device can be used in a standard mode system, but the requirement tSU:DAT > 250ns
must then be met. This will automatically be the case if the device does not stretch the LOW period of
the SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the
next data bit to the SDA line tRMAX + tSU:DAT = 1000 + 250 = 1250ns before the SCL line is
released.
6. After this period, the first clock pulse is generated.
7. The maximum tHD:DAT has only to be met if the device does not stretch the LOW period (tLOW) of
the SCL signal.
8. CB – Total capacitance of one bus line in picofarads, timing referenced to (0.9)(VDD) and (0.1)(VDD).
9. Absolute linearity is used to measure expected wiper voltage as determined by wiper position.
10. Relative linearity is used to determine the change of wiper voltage between two adjacent wiper
positions.
11. When used as a rheostat or variable resistor the resistance temperature coefficient is: 750ppm/°C.
When used as a voltage divider or potentiometer, the output voltage temperature coefficient
approaches 30 ppm/°C.
12. ICC specified with SDA pin open.
13. Maximum ICC is dependent on clock rates.
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相关代理商/技术参数 |
参数描述 |
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| DS1809 | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:Dallastat, 64-position linear taper |
| DS1809-010 | 功能描述:数字电位计 IC RoHS:否 制造商:Maxim Integrated 电阻:200 Ohms 温度系数:35 PPM / C 容差:25 % POT 数量:Dual 每 POT 分接头:256 弧刷存储器:Volatile 缓冲刷: 数字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作电源电压:1.7 V to 5.5 V 电源电流:27 uA 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:TQFN-16 封装:Reel |
| DS1809-010+ | 功能描述:数字电位计 IC Dallastat RoHS:否 制造商:Maxim Integrated 电阻:200 Ohms 温度系数:35 PPM / C 容差:25 % POT 数量:Dual 每 POT 分接头:256 弧刷存储器:Volatile 缓冲刷: 数字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作电源电压:1.7 V to 5.5 V 电源电流:27 uA 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:TQFN-16 封装:Reel |
| DS1809-050 | 功能描述:数字电位计 IC RoHS:否 制造商:Maxim Integrated 电阻:200 Ohms 温度系数:35 PPM / C 容差:25 % POT 数量:Dual 每 POT 分接头:256 弧刷存储器:Volatile 缓冲刷: 数字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作电源电压:1.7 V to 5.5 V 电源电流:27 uA 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:TQFN-16 封装:Reel |
| DS1809-050+ | 功能描述:数字电位计 IC Dallastat RoHS:否 制造商:Maxim Integrated 电阻:200 Ohms 温度系数:35 PPM / C 容差:25 % POT 数量:Dual 每 POT 分接头:256 弧刷存储器:Volatile 缓冲刷: 数字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作电源电压:1.7 V to 5.5 V 电源电流:27 uA 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:TQFN-16 封装:Reel |
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