参数资料
型号: DS1841X
厂商: Maxim Integrated Products
文件页数: 2/17页
文件大小: 0K
描述: IC RES LOG NV I2C DGTL 10TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
接片: 128
电阻(欧姆): 22k
电路数: 1
温度系数: 标准值 ±250 ppm/°C
存储器类型: 非易失
接口: I²C,2 线串口
电源电压: 2.7 V ~ 5.5 V
工作温度: -40°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 模具
供应商设备封装: 模具
包装: 管件
DS1841
Temperature-Controlled, NV, I2C,
Logarithmic Resistor
10
______________________________________________________________________________________
Memory Description
The DS1841’s internal memory consists of both volatile
and NV registers that are organized into eight byte
rows. Three control registers as well as specialized
data registers are used to control the wiper and drive
the LUT.
Register 00h: Initial Value Register (IVR)
FACTORY DEFAULT (IVR)
00h
MEMORY TYPE
NV
MEMORY TYPE
Volatile
00h
IVR
Bit 7
Bit 0
If
SEE bit = 0, an I2C READ retrieves the IVR value and an I2C WRITE sets the wiper position in volatile memory and
updates IVR in NV memory with this new value. If
SEE bit = 1, an I2C READ retrieves the WR value and an I2C WRITE
sets the wiper position (volatile) and the IVR value is not modified. During power-up, IVR’s value is used to set the wiper
position.
Register 02h: Control Register 0 (CR0)
FACTORY DEFAULT
00h
MEMORY TYPE
Volatile
02h
SEE
Reserved
Bit 7
Bit 0
Bit 7
SEE Controls IVR and WR functionality, as well as the memory type for Control Register 1.
0 = (Default) Issuing an I2C READ of the value in address 00h retrieves the IVR value. Issuing an I2C
WRITE to address 00h sets both the wiper’s position (volatile) and the IVR value (nonvolatile) to the
same value. Writes to Control Register 1 (03h) are stored in shadowed SRAM and EEPROM.
1 = Issuing an I2C READ of the value in address 00h retrieves the WR value. Issuing an I2C WRITE to
address 00h only sets the wiper’s position (volatile). The IVR value is not modified. Writes to Control
Register 1 (03h) are stored in shadowed SRAM only.
Bits 6 to 0
Reserved.
Control Register 0 determines how the wiper position values (volatile and NV versions) are set, as well as how writes to
Control Register 1 are stored.
The IVR is located at memory address 00h and is implemented as EEPROM shadowed SRAM. This register can be
visualized as an SRAM byte (the WR portion) in parallel with an EEPROM byte (the IVR portion). The operation of the
register is controlled by the Shadow EEPROM (
SEE) bit in Control Register 0, address 02h, bit 7. When the SEE bit = 0
(default), data written to memory address 00h by I2C actually gets stored in both SRAM (WR) and EEPROM (IVR). When
SEE = 1, only the SRAM (WR) is written to the new value. The EEPROM byte (IVR) continues to store the last value
written to it when
SEE was 0. Reading memory address 00h reads the value stored in WR. The SEE bit is volatile and its
power-up default state is 0.
Register Descriptions
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