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参数资料
| 型号： | DS1855B-050 |
| 元件分类： | 数字电位计 |
| 英文描述： | Dual Nonvolatile Digital Potentiometer and Secure Memory |
| 中文描述： | 双非易失数字电位器及安全存储器 |
| 文件页数： | 19/20页 |
| 文件大小： | 252K |
| 代理商： | DS1855B-050 |
DS1855
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2-WIRE SERIAL PORT OPERATION
The 2-wire serial port interface supports a bidirectional data transmission protocol with device
addressing. A device that sends data on the bus is defined as a transmitter, and a device receiving data is
defined as a receiver. The device that controls the message is called a “master.” The devices that are
controlled by the master are “slaves.” The bus must be controlled by a master device that generates the
serial clock (SCL), controls the bus access, and generates the START and STOP conditions. The DS1855
operates as a slave on the two-wire bus. Connections to the bus are made via the open-drain I/O lines,
SDA and SCL. The following I/O terminals control the 2-wire serial port: SDA, SCL, A0, A1, A2.
Timing diagrams for the 2-wire serial port can be found in Figures 2 and 3. Timing information for the 2-
wire serial port is provided in the AC Electrical Characteristics Table for 2-wire serial communications.
The following bus protocol has been defined:
1. Data transfer may be initiated only when the bus is not busy.
2. During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in
the data line while the clock line is HIGH will be interpreted as control signals.
Accordingly, the following bus conditions have been defined:
Bus not busy: Both data and clock lines remain HIGH.
Start data transfer: A change in the state of the data line from HIGH to LOW while the clock is HIGH
defines a START condition.
Stop data transfer: A change in the state of the data line from LOW to HIGH while the clock line is
HIGH defines the STOP condition.
Data valid: The state of the data line represents valid data when, after a START condition, the data line
is stable for the duration of the clock signal’s HIGH period. The data on the line can be changed during
the clock signal’s LOW period. There is one clock pulse per bit of data. Figures 2 and 3 detail how data
transfer is accomplished on the 2-wire bus. Depending on the state of the R/W bit, two types of data
transfer are possible.
Each data transfer is initiated with a START condition and terminated with a STOP condition. The
number of data bytes transferred between START and STOP conditions is not limited and is determined
by the master device. The information is transferred byte-wise and each receiver acknowledges with a 9th
bit.
A regular mode (100kHz clock rate) and a fast mode (400kHz clock rate) are defined within the bus
specifications. The DS1855 works in both modes.
Acknowledge: Each receiving device, when addressed, is obliged to generate an acknowledge after the
reception of each byte. The master device must generate an extra clock pulse, which is associated with
this acknowledge bit.
A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a
way that the SDA line is a stable LOW during the HIGH period of the acknowledge-related clock pulse.
Of course, setup and hold times must be taken into account. A master must signal an end of data to the
slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this
case, the slave must leave the data line HIGH to enable the master to generate the STOP condition.
相关PDF资料 |
PDF描述 |
|---|---|
| DS1855B-100 | Dual Nonvolatile Digital Potentiometer and Secure Memory |
| DS1855E-010 | Dual Nonvolatile Digital Potentiometer and Secure Memory |
| DS1855E-020 | Dual Nonvolatile Digital Potentiometer and Secure Memory |
| DS1855E-050 | Dual Nonvolatile Digital Potentiometer and Secure Memory |
| DS1855E-100 | Dual Nonvolatile Digital Potentiometer and Secure Memory |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1855B-050+ | 功能描述:数字电位计 IC Dual NV w/Memory RoHS:否 制造商:Maxim Integrated 电阻:200 Ohms 温度系数:35 PPM / C 容差:25 % POT 数量:Dual 每 POT 分接头:256 弧刷存储器:Volatile 缓冲刷: 数字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作电源电压:1.7 V to 5.5 V 电源电流:27 uA 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:TQFN-16 封装:Reel |
| DS1855B-100 | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:Dual Nonvolatile Digital Potentiometer and Secure Memory |
| DS1855B-100+ | 功能描述:数字电位计 IC Dual NV w/Memory RoHS:否 制造商:Maxim Integrated 电阻:200 Ohms 温度系数:35 PPM / C 容差:25 % POT 数量:Dual 每 POT 分接头:256 弧刷存储器:Volatile 缓冲刷: 数字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作电源电压:1.7 V to 5.5 V 电源电流:27 uA 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:TQFN-16 封装:Reel |
| DS1855E-010 | 功能描述:数字电位计 IC RoHS:否 制造商:Maxim Integrated 电阻:200 Ohms 温度系数:35 PPM / C 容差:25 % POT 数量:Dual 每 POT 分接头:256 弧刷存储器:Volatile 缓冲刷: 数字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作电源电压:1.7 V to 5.5 V 电源电流:27 uA 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:TQFN-16 封装:Reel |
| DS1855E-010/R | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:Dual Nonvolatile Digital Potentiometer and Secure Memory |
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